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Swap the order of imm and idx field for rri addrmode in order to make handling of rri and ri addrmodes common

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov 2009-07-16 13:48:42 +00:00
parent 3240740ef4
commit c4368a1507
3 changed files with 13 additions and 13 deletions
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6
lib/Target/SystemZ/AsmPrinter/SystemZAsmPrinter.cpp
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@ -208,10 +208,10 @@ void SystemZAsmPrinter::printRIAddrOperand(const MachineInstr *MI, int OpNum,
void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum,
const char* Modifier) {
const MachineOperand &Base = MI->getOperand(OpNum);
const MachineOperand &Index = MI->getOperand(OpNum+1);
const MachineOperand &Index = MI->getOperand(OpNum+2);
// Print displacement operand.
printOperand(MI, OpNum+2);
printOperand(MI, OpNum+1);
// Print base operand (if any)
if (Base.getReg()) {
@ -219,7 +219,7 @@ void SystemZAsmPrinter::printRRIAddrOperand(const MachineInstr *MI, int OpNum,
printOperand(MI, OpNum);
if (Index.getReg()) {
O << ',';
printOperand(MI, OpNum+1);
printOperand(MI, OpNum+2);
}
O << ')';
} else

16
lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
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@ -105,14 +105,14 @@ namespace {
#include "SystemZGenDAGISel.inc"
private:
bool SelectAddrRRI(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Index, SDValue &Disp);
bool SelectLAAddr(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Index, SDValue &Disp);
SDNode *Select(SDValue Op);
bool SelectAddrRI(const SDValue& Op, SDValue& Addr,
SDValue &Base, SDValue &Disp);
bool SelectAddrRRI(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Disp, SDValue &Index);
bool SelectLAAddr(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Disp, SDValue &Index);
SDNode *Select(SDValue Op);
bool MatchAddress(SDValue N, SystemZRRIAddressMode &AM, unsigned Depth = 0);
bool MatchAddressBase(SDValue N, SystemZRRIAddressMode &AM);
@ -368,7 +368,7 @@ bool SystemZDAGToDAGISel::MatchAddressBase(SDValue N,
/// Returns true if the address can be represented by a base register plus
/// index register plus a signed 20-bit displacement [base + idx + imm].
bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Index, SDValue &Disp) {
SDValue &Base, SDValue &Disp, SDValue &Index) {
SystemZRRIAddressMode AM;
bool Done = false;
@ -417,7 +417,7 @@ bool SystemZDAGToDAGISel::SelectAddrRRI(SDValue Op, SDValue Addr,
/// SelectLAAddr - it calls SelectAddr and determines if the maximal addressing
/// mode it matches can be cost effectively emitted as an LA/LAY instruction.
bool SystemZDAGToDAGISel::SelectLAAddr(SDValue Op, SDValue Addr,
SDValue &Base, SDValue &Index, SDValue &Disp) {
SDValue &Base, SDValue &Disp, SDValue &Index) {
SystemZRRIAddressMode AM;
if (MatchAddress(Addr, AM))

4
lib/Target/SystemZ/SystemZInstrInfo.td
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@ -164,12 +164,12 @@ def riaddr : Operand<i64>,
def rriaddr : Operand<i64>,
ComplexPattern<i64, 3, "SelectAddrRRI", [], []> {
let PrintMethod = "printRRIAddrOperand";
let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp);
let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index);
}
def laaddr : Operand<i64>,
ComplexPattern<i64, 3, "SelectLAAddr", [add, sub, or, frameindex], []> {
let PrintMethod = "printRRIAddrOperand";
let MIOperandInfo = (ops ADDR64:$base, ADDR64:$index, i64imm:$disp);
let MIOperandInfo = (ops ADDR64:$base, i64imm:$disp, ADDR64:$index);
}