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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-22 10:29:35 +00:00
Turn this into a table, this will make more sense shortly.
Part of rdar://8470697 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131200 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1482,6 +1482,22 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadAdd(SDNode *Node, EVT NVT) {
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}
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}
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static const unsigned int AtomicOpcTbl[1][11] = {
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{
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X86::LOCK_OR8mi,
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X86::LOCK_OR8mr,
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X86::LOCK_OR16mi8,
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X86::LOCK_OR16mi,
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X86::LOCK_OR16mr,
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X86::LOCK_OR32mi8,
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X86::LOCK_OR32mi,
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X86::LOCK_OR32mr,
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X86::LOCK_OR64mi8,
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X86::LOCK_OR64mi32,
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X86::LOCK_OR64mr
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}
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};
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SDNode *X86DAGToDAGISel::SelectAtomicLoadOr(SDNode *Node, EVT NVT) {
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if (Node->hasAnyUseOfValue(0))
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return 0;
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@ -1504,41 +1520,43 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadOr(SDNode *Node, EVT NVT) {
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Val = CurDAG->getTargetConstant(CN->getSExtValue(), NVT);
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}
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// Which index into the table.
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unsigned index = 0;
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unsigned Opc = 0;
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switch (NVT.getSimpleVT().SimpleTy) {
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default: return 0;
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case MVT::i8:
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if (isCN)
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Opc = X86::LOCK_OR8mi;
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Opc = AtomicOpcTbl[index][0];
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else
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Opc = X86::LOCK_OR8mr;
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Opc = AtomicOpcTbl[index][1];
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break;
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case MVT::i16:
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if (isCN) {
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if (immSext8(Val.getNode()))
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Opc = X86::LOCK_OR16mi8;
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Opc = AtomicOpcTbl[index][2];
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else
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Opc = X86::LOCK_OR16mi;
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Opc = AtomicOpcTbl[index][3];
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} else
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Opc = X86::LOCK_OR16mr;
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Opc = AtomicOpcTbl[index][4];
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break;
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case MVT::i32:
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if (isCN) {
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if (immSext8(Val.getNode()))
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Opc = X86::LOCK_OR32mi8;
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Opc = AtomicOpcTbl[index][5];
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else
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Opc = X86::LOCK_OR32mi;
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Opc = AtomicOpcTbl[index][6];
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} else
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Opc = X86::LOCK_OR32mr;
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Opc = AtomicOpcTbl[index][7];
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break;
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case MVT::i64:
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if (isCN) {
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if (immSext8(Val.getNode()))
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Opc = X86::LOCK_OR64mi8;
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Opc = AtomicOpcTbl[index][8];
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else if (i64immSExt32(Val.getNode()))
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Opc = X86::LOCK_OR64mi32;
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Opc = AtomicOpcTbl[index][9];
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} else
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Opc = X86::LOCK_OR64mr;
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Opc = AtomicOpcTbl[index][10];
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break;
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}
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