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Use array_lengthof to compute the number of iterations of a loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143991 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -191,23 +191,23 @@ BitVector MipsRegisterInfo::
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getReservedRegs(const MachineFunction &MF) const {
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static const unsigned ReservedCPURegs[] = {
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Mips::ZERO, Mips::AT, Mips::K0, Mips::K1,
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Mips::GP, Mips::SP, Mips::FP, Mips::RA, 0
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Mips::GP, Mips::SP, Mips::FP, Mips::RA
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};
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static const unsigned ReservedCPU64Regs[] = {
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Mips::ZERO_64, Mips::AT_64, Mips::K0_64, Mips::K1_64,
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Mips::GP_64, Mips::SP_64, Mips::FP_64, Mips::RA_64, 0
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Mips::GP_64, Mips::SP_64, Mips::FP_64, Mips::RA_64
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};
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BitVector Reserved(getNumRegs());
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typedef TargetRegisterClass::iterator RegIter;
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for (const unsigned *Reg = ReservedCPURegs; *Reg; ++Reg)
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Reserved.set(*Reg);
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for (unsigned I = 0; I < array_lengthof(ReservedCPURegs); ++I)
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Reserved.set(ReservedCPURegs[I]);
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if (Subtarget.hasMips64()) {
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for (const unsigned *Reg = ReservedCPU64Regs; *Reg; ++Reg)
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Reserved.set(*Reg);
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for (unsigned I = 0; I < array_lengthof(ReservedCPU64Regs); ++I)
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Reserved.set(ReservedCPU64Regs[I]);
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// Reserve all registers in AFGR64.
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for (RegIter Reg = Mips::AFGR64RegisterClass->begin();
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