6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2026-04-23 22:23:00 +00:00
Code Issues Projects Releases Wiki Activity

Add intrinsics for SETEV, GETED, GETET.

Browse Source 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137938 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Richard Osborne
2011-08-18 13:00:48 +00:00
parent 10077194ec
commit c4dcf323cc
4 changed files with 52 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files
test/CodeGen/XCore/misc-intrinsics.ll
+18
View File
@@ -6,6 +6,8 @@ declare i32 @llvm.xcore.crc32(i32, i32, i32)
declare %0 @llvm.xcore.crc8(i32, i32, i32)
declare i32 @llvm.xcore.zext(i32, i32)
declare i32 @llvm.xcore.sext(i32, i32)
declare i32 @llvm.xcore.geted()
declare i32 @llvm.xcore.getet()
define i32 @bitrev(i32 %val) {
; CHECK: bitrev:
@@ -55,3 +57,19 @@ define i32 @sexti(i32 %a) {
%result = call i32 @llvm.xcore.sext(i32 %a, i32 4)
ret i32 %result
}
define i32 @geted() {
; CHECK: geted:
; CHECK: get r11, ed
; CHECK-NEXT: mov r0, r11
%result = call i32 @llvm.xcore.geted()
ret i32 %result
}
define i32 @getet() {
; CHECK: getet:
; CHECK: get r11, et
; CHECK-NEXT: mov r0, r11
%result = call i32 @llvm.xcore.getet()
ret i32 %result
}
test/CodeGen/XCore/resources.ll
+9
View File
@@ -20,6 +20,7 @@ declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r)
declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r)
declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value)
declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p)
declare void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r)
declare void @llvm.xcore.setclk.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
declare void @llvm.xcore.setrdy.p1i8.p1i8(i8 addrspace(1)* %a, i8 addrspace(1)* %b)
@@ -175,6 +176,14 @@ define void @setv(i8 addrspace(1)* %r, i8* %p) {
ret void
}
define void @setev(i8 addrspace(1)* %r, i8* %p) {
; CHECK: setev:
; CHECK: mov r11, r1
; CHECK-NEXT: setev res[r0], r11
call void @llvm.xcore.setev.p1i8(i8 addrspace(1)* %r, i8* %p)
ret void
}
define void @eeu(i8 addrspace(1)* %r) {
; CHECK: eeu:
; CHECK: eeu res[r0]