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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-14 11:32:34 +00:00
add support for the 'w' inline asm register class.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35598 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1598,6 +1598,7 @@ ARMTargetLowering::getConstraintType(const std::string &Constraint) const {
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switch (Constraint[0]) {
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default: break;
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case 'l': return C_RegisterClass;
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case 'w': return C_RegisterClass;
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}
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}
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return TargetLowering::getConstraintType(Constraint);
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@ -1609,12 +1610,17 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
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if (Constraint.size() == 1) {
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// GCC RS6000 Constraint Letters
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switch (Constraint[0]) {
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case 'l':
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// FIXME: in thumb mode, 'l' is only low-regs.
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// FALL THROUGH.
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case 'r':
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return std::make_pair(0U, ARM::GPRRegisterClass);
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break;
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case 'l':
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// FIXME: in thumb mode, 'l' is only low-regs.
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// FALL THROUGH.
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case 'r':
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return std::make_pair(0U, ARM::GPRRegisterClass);
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case 'w':
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if (VT == MVT::f32)
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return std::make_pair(0U, ARM::SPRRegisterClass);
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if (VT == MVT::f32)
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return std::make_pair(0U, ARM::DPRRegisterClass);
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break;
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}
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}
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return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
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@ -1634,6 +1640,22 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint,
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ARM::R4, ARM::R5, ARM::R6, ARM::R7,
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ARM::R8, ARM::R9, ARM::R10, ARM::R11,
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ARM::R12, ARM::LR, 0);
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case 'w':
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if (VT == MVT::f32)
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return make_vector<unsigned>(ARM::S0, ARM::S1, ARM::S2, ARM::S3,
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ARM::S4, ARM::S5, ARM::S6, ARM::S7,
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ARM::S8, ARM::S9, ARM::S10, ARM::S11,
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ARM::S12,ARM::S13,ARM::S14,ARM::S15,
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ARM::S16,ARM::S17,ARM::S18,ARM::S19,
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ARM::S20,ARM::S21,ARM::S22,ARM::S23,
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ARM::S24,ARM::S25,ARM::S26,ARM::S27,
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ARM::S28,ARM::S29,ARM::S30,ARM::S31, 0);
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if (VT == MVT::f64)
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return make_vector<unsigned>(ARM::D0, ARM::D1, ARM::D2, ARM::D3,
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ARM::D4, ARM::D5, ARM::D6, ARM::D7,
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ARM::D8, ARM::D9, ARM::D10,ARM::D11,
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ARM::D12,ARM::D13,ARM::D14,ARM::D15, 0);
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break;
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}
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return std::vector<unsigned>();
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