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https://github.com/c64scene-ar/llvm-6502.git
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X86 intrinsics moved form X86ISelLowering.cpp to X86IntrinsicsInfo.h
X86ISelLowering.cpp has a long switch for intrinsics. I moved a part of this long switch to the new intrinsics table in X86IntrinsicsInfo.h. No functional changes, just code and compile time optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223641 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Elena Demikhovsky
parent
726bd41602
commit
c4fbd3fd62
@ -16945,138 +16945,6 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget
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switch (IntNo) {
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default: return SDValue(); // Don't custom lower most intrinsics.
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// Arithmetic intrinsics.
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case Intrinsic::x86_sse2_pmulu_dq:
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case Intrinsic::x86_avx2_pmulu_dq:
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return DAG.getNode(X86ISD::PMULUDQ, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse41_pmuldq:
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case Intrinsic::x86_avx2_pmul_dq:
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return DAG.getNode(X86ISD::PMULDQ, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_pmulhu_w:
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case Intrinsic::x86_avx2_pmulhu_w:
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return DAG.getNode(ISD::MULHU, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_pmulh_w:
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case Intrinsic::x86_avx2_pmulh_w:
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return DAG.getNode(ISD::MULHS, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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// SSE/SSE2/AVX floating point max/min intrinsics.
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case Intrinsic::x86_sse_max_ps:
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case Intrinsic::x86_sse2_max_pd:
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case Intrinsic::x86_avx_max_ps_256:
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case Intrinsic::x86_avx_max_pd_256:
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case Intrinsic::x86_sse_min_ps:
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case Intrinsic::x86_sse2_min_pd:
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case Intrinsic::x86_avx_min_ps_256:
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case Intrinsic::x86_avx_min_pd_256: {
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unsigned Opcode;
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switch (IntNo) {
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default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
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case Intrinsic::x86_sse_max_ps:
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case Intrinsic::x86_sse2_max_pd:
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case Intrinsic::x86_avx_max_ps_256:
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case Intrinsic::x86_avx_max_pd_256:
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Opcode = X86ISD::FMAX;
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break;
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case Intrinsic::x86_sse_min_ps:
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case Intrinsic::x86_sse2_min_pd:
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case Intrinsic::x86_avx_min_ps_256:
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case Intrinsic::x86_avx_min_pd_256:
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Opcode = X86ISD::FMIN;
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break;
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}
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return DAG.getNode(Opcode, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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}
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// AVX2 variable shift intrinsics
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case Intrinsic::x86_avx2_psllv_d:
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case Intrinsic::x86_avx2_psllv_q:
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case Intrinsic::x86_avx2_psllv_d_256:
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case Intrinsic::x86_avx2_psllv_q_256:
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case Intrinsic::x86_avx2_psrlv_d:
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case Intrinsic::x86_avx2_psrlv_q:
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case Intrinsic::x86_avx2_psrlv_d_256:
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case Intrinsic::x86_avx2_psrlv_q_256:
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case Intrinsic::x86_avx2_psrav_d:
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case Intrinsic::x86_avx2_psrav_d_256: {
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unsigned Opcode;
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switch (IntNo) {
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default: llvm_unreachable("Impossible intrinsic"); // Can't reach here.
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case Intrinsic::x86_avx2_psllv_d:
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case Intrinsic::x86_avx2_psllv_q:
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case Intrinsic::x86_avx2_psllv_d_256:
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case Intrinsic::x86_avx2_psllv_q_256:
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Opcode = ISD::SHL;
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break;
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case Intrinsic::x86_avx2_psrlv_d:
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case Intrinsic::x86_avx2_psrlv_q:
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case Intrinsic::x86_avx2_psrlv_d_256:
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case Intrinsic::x86_avx2_psrlv_q_256:
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Opcode = ISD::SRL;
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break;
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case Intrinsic::x86_avx2_psrav_d:
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case Intrinsic::x86_avx2_psrav_d_256:
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Opcode = ISD::SRA;
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break;
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}
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return DAG.getNode(Opcode, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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}
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case Intrinsic::x86_sse2_packssdw_128:
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case Intrinsic::x86_sse2_packsswb_128:
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case Intrinsic::x86_avx2_packssdw:
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case Intrinsic::x86_avx2_packsswb:
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return DAG.getNode(X86ISD::PACKSS, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_packuswb_128:
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case Intrinsic::x86_sse41_packusdw:
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case Intrinsic::x86_avx2_packuswb:
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case Intrinsic::x86_avx2_packusdw:
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return DAG.getNode(X86ISD::PACKUS, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_ssse3_pshuf_b_128:
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case Intrinsic::x86_avx2_pshuf_b:
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return DAG.getNode(X86ISD::PSHUFB, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_pshuf_d:
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return DAG.getNode(X86ISD::PSHUFD, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_pshufl_w:
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return DAG.getNode(X86ISD::PSHUFLW, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_sse2_pshufh_w:
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return DAG.getNode(X86ISD::PSHUFHW, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_ssse3_psign_b_128:
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case Intrinsic::x86_ssse3_psign_w_128:
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case Intrinsic::x86_ssse3_psign_d_128:
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case Intrinsic::x86_avx2_psign_b:
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case Intrinsic::x86_avx2_psign_w:
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case Intrinsic::x86_avx2_psign_d:
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return DAG.getNode(X86ISD::PSIGN, dl, Op.getValueType(),
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Op.getOperand(1), Op.getOperand(2));
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case Intrinsic::x86_avx2_permd:
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case Intrinsic::x86_avx2_permps:
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// Operands intentionally swapped. Mask is last operand to intrinsic,
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// but second operand for node/instruction.
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return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),
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Op.getOperand(2), Op.getOperand(1));
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case Intrinsic::x86_avx512_mask_valign_q_512:
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case Intrinsic::x86_avx512_mask_valign_d_512:
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// Vector source operands are swapped.
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@ -122,6 +122,12 @@ static const IntrinsicData* getIntrinsicWithChain(unsigned IntNo) {
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* the alphabetical order.
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*/
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static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx2_packssdw, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
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X86_INTRINSIC_DATA(avx2_packsswb, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
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X86_INTRINSIC_DATA(avx2_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
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X86_INTRINSIC_DATA(avx2_packuswb, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
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X86_INTRINSIC_DATA(avx2_permd, INTR_TYPE_2OP, X86ISD::VPERMV, 0),
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X86_INTRINSIC_DATA(avx2_permps, INTR_TYPE_2OP, X86ISD::VPERMV, 0),
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X86_INTRINSIC_DATA(avx2_phadd_d, INTR_TYPE_2OP, X86ISD::HADD, 0),
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X86_INTRINSIC_DATA(avx2_phadd_w, INTR_TYPE_2OP, X86ISD::HADD, 0),
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X86_INTRINSIC_DATA(avx2_phsub_d, INTR_TYPE_2OP, X86ISD::HSUB, 0),
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@ -150,22 +156,40 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx2_pmovzxdq, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(avx2_pmovzxwd, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(avx2_pmovzxwq, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(avx2_pmul_dq, INTR_TYPE_2OP, X86ISD::PMULDQ, 0),
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X86_INTRINSIC_DATA(avx2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
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X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
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X86_INTRINSIC_DATA(avx2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
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X86_INTRINSIC_DATA(avx2_pshuf_b, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
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X86_INTRINSIC_DATA(avx2_psign_b, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
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X86_INTRINSIC_DATA(avx2_psign_d, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
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X86_INTRINSIC_DATA(avx2_psign_w, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
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X86_INTRINSIC_DATA(avx2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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X86_INTRINSIC_DATA(avx2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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X86_INTRINSIC_DATA(avx2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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X86_INTRINSIC_DATA(avx2_pslli_d, VSHIFT, X86ISD::VSHLI, 0),
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X86_INTRINSIC_DATA(avx2_pslli_q, VSHIFT, X86ISD::VSHLI, 0),
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X86_INTRINSIC_DATA(avx2_pslli_w, VSHIFT, X86ISD::VSHLI, 0),
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X86_INTRINSIC_DATA(avx2_psllv_d, INTR_TYPE_2OP, ISD::SHL, 0),
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X86_INTRINSIC_DATA(avx2_psllv_d_256, INTR_TYPE_2OP, ISD::SHL, 0),
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X86_INTRINSIC_DATA(avx2_psllv_q, INTR_TYPE_2OP, ISD::SHL, 0),
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X86_INTRINSIC_DATA(avx2_psllv_q_256, INTR_TYPE_2OP, ISD::SHL, 0),
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X86_INTRINSIC_DATA(avx2_psra_d, INTR_TYPE_2OP, X86ISD::VSRA, 0),
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X86_INTRINSIC_DATA(avx2_psra_w, INTR_TYPE_2OP, X86ISD::VSRA, 0),
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X86_INTRINSIC_DATA(avx2_psrai_d, VSHIFT, X86ISD::VSRAI, 0),
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X86_INTRINSIC_DATA(avx2_psrai_w, VSHIFT, X86ISD::VSRAI, 0),
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X86_INTRINSIC_DATA(avx2_psrav_d, INTR_TYPE_2OP, ISD::SRA, 0),
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X86_INTRINSIC_DATA(avx2_psrav_d_256, INTR_TYPE_2OP, ISD::SRA, 0),
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X86_INTRINSIC_DATA(avx2_psrl_d, INTR_TYPE_2OP, X86ISD::VSRL, 0),
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X86_INTRINSIC_DATA(avx2_psrl_q, INTR_TYPE_2OP, X86ISD::VSRL, 0),
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X86_INTRINSIC_DATA(avx2_psrl_w, INTR_TYPE_2OP, X86ISD::VSRL, 0),
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X86_INTRINSIC_DATA(avx2_psrli_d, VSHIFT, X86ISD::VSRLI, 0),
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X86_INTRINSIC_DATA(avx2_psrli_q, VSHIFT, X86ISD::VSRLI, 0),
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X86_INTRINSIC_DATA(avx2_psrli_w, VSHIFT, X86ISD::VSRLI, 0),
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X86_INTRINSIC_DATA(avx2_psrlv_d, INTR_TYPE_2OP, ISD::SRL, 0),
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X86_INTRINSIC_DATA(avx2_psrlv_d_256, INTR_TYPE_2OP, ISD::SRL, 0),
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X86_INTRINSIC_DATA(avx2_psrlv_q, INTR_TYPE_2OP, ISD::SRL, 0),
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X86_INTRINSIC_DATA(avx2_psrlv_q_256, INTR_TYPE_2OP, ISD::SRL, 0),
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X86_INTRINSIC_DATA(avx2_psubus_b, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
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X86_INTRINSIC_DATA(avx2_psubus_w, INTR_TYPE_2OP, X86ISD::SUBUS, 0),
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X86_INTRINSIC_DATA(avx2_vperm2i128, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
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@ -243,6 +267,10 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(avx_hadd_ps_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
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X86_INTRINSIC_DATA(avx_hsub_pd_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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X86_INTRINSIC_DATA(avx_hsub_ps_256, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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X86_INTRINSIC_DATA(avx_max_pd_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
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X86_INTRINSIC_DATA(avx_max_ps_256, INTR_TYPE_2OP, X86ISD::FMAX, 0),
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X86_INTRINSIC_DATA(avx_min_pd_256, INTR_TYPE_2OP, X86ISD::FMIN, 0),
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X86_INTRINSIC_DATA(avx_min_ps_256, INTR_TYPE_2OP, X86ISD::FMIN, 0),
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X86_INTRINSIC_DATA(avx_sqrt_pd_256, INTR_TYPE_1OP, ISD::FSQRT, 0),
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X86_INTRINSIC_DATA(avx_sqrt_ps_256, INTR_TYPE_1OP, ISD::FSQRT, 0),
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X86_INTRINSIC_DATA(avx_vperm2f128_pd_256, INTR_TYPE_3OP, X86ISD::VPERM2X128, 0),
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@ -254,10 +282,21 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE),
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X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT),
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X86_INTRINSIC_DATA(sse2_comineq_sd, COMI, X86ISD::COMI, ISD::SETNE),
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X86_INTRINSIC_DATA(sse2_max_pd, INTR_TYPE_2OP, X86ISD::FMAX, 0),
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X86_INTRINSIC_DATA(sse2_min_pd, INTR_TYPE_2OP, X86ISD::FMIN, 0),
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X86_INTRINSIC_DATA(sse2_packssdw_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
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X86_INTRINSIC_DATA(sse2_packsswb_128, INTR_TYPE_2OP, X86ISD::PACKSS, 0),
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X86_INTRINSIC_DATA(sse2_packuswb_128, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
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X86_INTRINSIC_DATA(sse2_pmaxs_w, INTR_TYPE_2OP, X86ISD::SMAX, 0),
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X86_INTRINSIC_DATA(sse2_pmaxu_b, INTR_TYPE_2OP, X86ISD::UMAX, 0),
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X86_INTRINSIC_DATA(sse2_pmins_w, INTR_TYPE_2OP, X86ISD::SMIN, 0),
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X86_INTRINSIC_DATA(sse2_pminu_b, INTR_TYPE_2OP, X86ISD::UMIN, 0),
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X86_INTRINSIC_DATA(sse2_pmulh_w, INTR_TYPE_2OP, ISD::MULHS, 0),
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X86_INTRINSIC_DATA(sse2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
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X86_INTRINSIC_DATA(sse2_pmulu_dq, INTR_TYPE_2OP, X86ISD::PMULUDQ, 0),
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X86_INTRINSIC_DATA(sse2_pshuf_d, INTR_TYPE_2OP, X86ISD::PSHUFD, 0),
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X86_INTRINSIC_DATA(sse2_pshufh_w, INTR_TYPE_2OP, X86ISD::PSHUFHW, 0),
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X86_INTRINSIC_DATA(sse2_pshufl_w, INTR_TYPE_2OP, X86ISD::PSHUFLW, 0),
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X86_INTRINSIC_DATA(sse2_psll_d, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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X86_INTRINSIC_DATA(sse2_psll_q, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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X86_INTRINSIC_DATA(sse2_psll_w, INTR_TYPE_2OP, X86ISD::VSHL, 0),
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@ -288,6 +327,7 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(sse3_hsub_pd, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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X86_INTRINSIC_DATA(sse3_hsub_ps, INTR_TYPE_2OP, X86ISD::FHSUB, 0),
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X86_INTRINSIC_DATA(sse41_insertps, INTR_TYPE_3OP, X86ISD::INSERTPS, 0),
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X86_INTRINSIC_DATA(sse41_packusdw, INTR_TYPE_2OP, X86ISD::PACKUS, 0),
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X86_INTRINSIC_DATA(sse41_pmaxsb, INTR_TYPE_2OP, X86ISD::SMAX, 0),
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X86_INTRINSIC_DATA(sse41_pmaxsd, INTR_TYPE_2OP, X86ISD::SMAX, 0),
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X86_INTRINSIC_DATA(sse41_pmaxud, INTR_TYPE_2OP, X86ISD::UMAX, 0),
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@ -308,12 +348,15 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(sse41_pmovzxdq, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(sse41_pmovzxwd, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(sse41_pmovzxwq, INTR_TYPE_1OP, X86ISD::VZEXT, 0),
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X86_INTRINSIC_DATA(sse41_pmuldq, INTR_TYPE_2OP, X86ISD::PMULDQ, 0),
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X86_INTRINSIC_DATA(sse_comieq_ss, COMI, X86ISD::COMI, ISD::SETEQ),
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X86_INTRINSIC_DATA(sse_comige_ss, COMI, X86ISD::COMI, ISD::SETGE),
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X86_INTRINSIC_DATA(sse_comigt_ss, COMI, X86ISD::COMI, ISD::SETGT),
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X86_INTRINSIC_DATA(sse_comile_ss, COMI, X86ISD::COMI, ISD::SETLE),
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X86_INTRINSIC_DATA(sse_comilt_ss, COMI, X86ISD::COMI, ISD::SETLT),
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X86_INTRINSIC_DATA(sse_comineq_ss, COMI, X86ISD::COMI, ISD::SETNE),
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X86_INTRINSIC_DATA(sse_max_ps, INTR_TYPE_2OP, X86ISD::FMAX, 0),
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X86_INTRINSIC_DATA(sse_min_ps, INTR_TYPE_2OP, X86ISD::FMIN, 0),
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X86_INTRINSIC_DATA(sse_sqrt_ps, INTR_TYPE_1OP, ISD::FSQRT, 0),
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X86_INTRINSIC_DATA(sse_ucomieq_ss, COMI, X86ISD::UCOMI, ISD::SETEQ),
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X86_INTRINSIC_DATA(sse_ucomige_ss, COMI, X86ISD::UCOMI, ISD::SETGE),
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@ -324,7 +367,11 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
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X86_INTRINSIC_DATA(ssse3_phadd_d_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
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X86_INTRINSIC_DATA(ssse3_phadd_w_128, INTR_TYPE_2OP, X86ISD::HADD, 0),
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X86_INTRINSIC_DATA(ssse3_phsub_d_128, INTR_TYPE_2OP, X86ISD::HSUB, 0),
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X86_INTRINSIC_DATA(ssse3_phsub_w_128, INTR_TYPE_2OP, X86ISD::HSUB, 0)
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X86_INTRINSIC_DATA(ssse3_phsub_w_128, INTR_TYPE_2OP, X86ISD::HSUB, 0),
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X86_INTRINSIC_DATA(ssse3_pshuf_b_128, INTR_TYPE_2OP, X86ISD::PSHUFB, 0),
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X86_INTRINSIC_DATA(ssse3_psign_b_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
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X86_INTRINSIC_DATA(ssse3_psign_d_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0),
|
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X86_INTRINSIC_DATA(ssse3_psign_w_128, INTR_TYPE_2OP, X86ISD::PSIGN, 0)
|
||||
};
|
||||
|
||||
/*
|
||||
|
||||
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Block a user