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switch the x86 asmprinters to use getRegisterName instead

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of getting it from TRI, inst printing now is codegen context
free!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81710 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2009-09-13 20:15:16 +00:00
parent 1e31a13e32
commit c510f4cb6e
5 changed files with 11 additions and 18 deletions
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2
lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
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@ -48,7 +48,7 @@ STATISTIC(EmittedInsts, "Number of machine instrs printed");
//===----------------------------------------------------------------------===//
void X86ATTAsmPrinter::printMCInst(const MCInst *MI) {
X86ATTInstPrinter(O, MAI, TRI).printInstruction(MI);
X86ATTInstPrinter(O, MAI).printInstruction(MI);
}
void X86ATTAsmPrinter::PrintPICBaseSymbol() const {

3
lib/Target/X86/AsmPrinter/X86ATTInstPrinter.cpp
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@ -19,7 +19,6 @@
#include "llvm/MC/MCExpr.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/FormattedStream.h"
#include "llvm/Target/TargetRegisterInfo.h" // FIXME: REMOVE.
using namespace llvm;
// Include the auto-generated portion of the assembly writer.
@ -70,7 +69,7 @@ void X86ATTInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
const MCOperand &Op = MI->getOperand(OpNo);
if (Op.isReg()) {
O << '%' << TRI->getAsmName(Op.getReg());
O << '%' << getRegisterName(Op.getReg());
return;
} else if (Op.isImm()) {
O << '$' << Op.getImm();

4
lib/Target/X86/AsmPrinter/X86ATTInstPrinter.h
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@ -24,10 +24,8 @@ namespace llvm {
class X86ATTInstPrinter {
raw_ostream &O;
const MCAsmInfo *MAI;
const TargetRegisterInfo *TRI; // FIXME: Elim.
public:
X86ATTInstPrinter(raw_ostream &o, const MCAsmInfo *mai,
const TargetRegisterInfo *tri) : O(o), MAI(mai), TRI(tri) {}
X86ATTInstPrinter(raw_ostream &o, const MCAsmInfo *mai) : O(o), MAI(mai) {}
// Autogenerated by tblgen.
void printInstruction(const MCInst *MI);

9
lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
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@ -214,6 +214,11 @@ static void PrintRegName(raw_ostream &O, StringRef RegName) {
O << (char)toupper(RegName[i]);
}
void X86IntelAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
const char *Modifier) {
printOp(MI->getOperand(OpNo), Modifier);
}
void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
const char *Modifier) {
switch (MO.getType()) {
@ -226,7 +231,7 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
((strcmp(Modifier,"subreg16") == 0) ? MVT::i16 :MVT::i8));
Reg = getX86SubSuperRegister(Reg, VT);
}
PrintRegName(O, TRI->getAsmName(Reg));
PrintRegName(O, getRegisterName(Reg));
return;
}
case MachineOperand::MO_Immediate:
@ -399,7 +404,7 @@ bool X86IntelAsmPrinter::printAsmMRegister(const MachineOperand &MO,
break;
}
PrintRegName(O, TRI->getAsmName(Reg));
PrintRegName(O, getRegisterName(Reg));
return false;
}

11
lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.h
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@ -43,16 +43,7 @@ struct VISIBILITY_HIDDEN X86IntelAsmPrinter : public AsmPrinter {
// This method is used by the tablegen'erated instruction printer.
void printOperand(const MachineInstr *MI, unsigned OpNo,
const char *Modifier = 0) {
const MachineOperand &MO = MI->getOperand(OpNo);
if (MO.isReg()) {
assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
"Not physreg??");
O << TM.getRegisterInfo()->get(MO.getReg()).Name; // Capitalized names
} else {
printOp(MO, Modifier);
}
}
const char *Modifier = 0);
void print_pcrel_imm(const MachineInstr *MI, unsigned OpNo);