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Fix an assertion caused by using inline asm with indirect register inputs.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204425 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Qin
2014-03-21 02:14:50 +00:00
parent 287cc35cd7
commit c53b3dbc20
2 changed files with 17 additions and 1 deletions
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2
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@@ -6185,7 +6185,7 @@ static void GetRegistersForValue(SelectionDAG &DAG,
// types are identical size, use a bitcast to convert (e.g. two differing
// vector types).
MVT RegVT = *PhysReg.second->vt_begin();
if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
if (RegVT.getSizeInBits() == OpInfo.CallOperand.getValueSizeInBits()) {
OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
RegVT, OpInfo.CallOperand);
OpInfo.ConstraintVT = RegVT;