From c563e1d8fe2e0e9bb47e99ec55c277404969287e Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 10 Jul 2008 23:46:13 +0000 Subject: [PATCH] Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed when working on legalizetypes. Both legalizetypes and legalizeops now produce hte same code for CodeGen/ARM/fcopysign.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53435 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 80502cfe698..4b4c02bd8d8 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -547,8 +547,11 @@ SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT, SignBit = DAG.getNode(ISD::SRL, SrcNVT, SignBit, DAG.getConstant(SizeDiff, TLI.getShiftAmountTy())); SignBit = DAG.getNode(ISD::TRUNCATE, NVT, SignBit); - } else if (SizeDiff < 0) - SignBit = DAG.getNode(ISD::SIGN_EXTEND, NVT, SignBit); + } else if (SizeDiff < 0) { + SignBit = DAG.getNode(ISD::ZERO_EXTEND, NVT, SignBit); + SignBit = DAG.getNode(ISD::SHL, NVT, SignBit, + DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy())); + } // Clear the sign bit of first operand. SDOperand Mask2 = (VT == MVT::f64)