Update README entry.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125658 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Eli Friedman 2011-02-16 07:17:44 +00:00
parent 7bccf6abdc
commit c5cb996e9c

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@ -1783,13 +1783,12 @@ entry:
}
Generated code:
addq %rcx, %rdx
movl $0, %eax
adcq $0, %rax
addq %r8, %rax
movq %rax, (%rdi)
movq %rdx, (%rsi)
ret
addq %rcx, %rdx
sbbq %rax, %rax
subq %rax, %r8
movq %r8, (%rdi)
movq %rdx, (%rsi)
ret
Expected code:
addq %rcx, %rdx
@ -1798,12 +1797,6 @@ Expected code:
movq %rdx, (%rsi)
ret
The generated SelectionDAG has an ADD of an ADDE, where both operands of the
ADDE are zero. Replacing one of the operands of the ADDE with the other operand
of the ADD, and replacing the ADD with the ADDE, should give the desired result.
(That said, we are doing a lot better than gcc on this testcase. :) )
//===---------------------------------------------------------------------===//
Switch lowering generates less than ideal code for the following switch: