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[X86] Improve comments for r214888

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A rebase somehow ate my comments. This restores them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214903 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Adam Nemet 2014-08-05 17:58:49 +00:00
parent c1072cf96d
commit c64a05905a
1 changed files with 14 additions and 8 deletions
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22
lib/Target/X86/X86ISelLowering.cpp
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@ -3803,6 +3803,9 @@ static bool isPSHUFLWMask(ArrayRef<int> Mask, MVT VT, bool HasInt256) {
return true; return true;
} }
/// \brief Return true if the mask specifies a shuffle of elements that is
/// suitable for input to intralane (palignr) or interlane (valign) vector
/// right-shift.
static bool isAlignrMask(ArrayRef<int> Mask, MVT VT, bool InterLane) { static bool isAlignrMask(ArrayRef<int> Mask, MVT VT, bool InterLane) {
unsigned NumElts = VT.getVectorNumElements(); unsigned NumElts = VT.getVectorNumElements();
unsigned NumLanes = InterLane ? 1: VT.getSizeInBits()/128; unsigned NumLanes = InterLane ? 1: VT.getSizeInBits()/128;
@ -3869,8 +3872,8 @@ static bool isAlignrMask(ArrayRef<int> Mask, MVT VT, bool InterLane) {
return true; return true;
} }
/// isPALIGNRMask - Return true if the node specifies a shuffle of elements that /// \brief Return true if the node specifies a shuffle of elements that is
/// is suitable for input to PALIGNR. /// suitable for input to PALIGNR.
static bool isPALIGNRMask(ArrayRef<int> Mask, MVT VT, static bool isPALIGNRMask(ArrayRef<int> Mask, MVT VT,
const X86Subtarget *Subtarget) { const X86Subtarget *Subtarget) {
if ((VT.is128BitVector() && !Subtarget->hasSSSE3()) || if ((VT.is128BitVector() && !Subtarget->hasSSSE3()) ||
@ -3881,8 +3884,8 @@ static bool isPALIGNRMask(ArrayRef<int> Mask, MVT VT,
return isAlignrMask(Mask, VT, false); return isAlignrMask(Mask, VT, false);
} }
/// isPALIGNRMask - Return true if the node specifies a shuffle of elements that /// \brief Return true if the node specifies a shuffle of elements that is
/// is suitable for input to PALIGNR. /// suitable for input to VALIGN.
static bool isVALIGNMask(ArrayRef<int> Mask, MVT VT, static bool isVALIGNMask(ArrayRef<int> Mask, MVT VT,
const X86Subtarget *Subtarget) { const X86Subtarget *Subtarget) {
// FIXME: Add AVX512VL. // FIXME: Add AVX512VL.
@ -4715,8 +4718,9 @@ static unsigned getShufflePSHUFLWImmediate(ShuffleVectorSDNode *N) {
return Mask; return Mask;
} }
/// getShufflePALIGNRImmediate - Return the appropriate immediate to shuffle /// \brief Return the appropriate immediate to shuffle the specified
/// the specified VECTOR_SHUFFLE mask with the PALIGNR instruction. /// VECTOR_SHUFFLE mask with the PALIGNR (if InterLane is false) or with
/// VALIGN (if Interlane is true) instructions.
static unsigned getShuffleAlignrImmediate(ShuffleVectorSDNode *SVOp, static unsigned getShuffleAlignrImmediate(ShuffleVectorSDNode *SVOp,
bool InterLane) { bool InterLane) {
MVT VT = SVOp->getSimpleValueType(0); MVT VT = SVOp->getSimpleValueType(0);
@ -4741,12 +4745,14 @@ static unsigned getShuffleAlignrImmediate(ShuffleVectorSDNode *SVOp,
return (Val - i) * EltSize; return (Val - i) * EltSize;
} }
/// getShufflePALIGNRImmediate - Return the appropriate immediate to shuffle /// \brief Return the appropriate immediate to shuffle the specified
/// the specified VECTOR_SHUFFLE mask with the PALIGNR instruction. /// VECTOR_SHUFFLE mask with the PALIGNR instruction.
static unsigned getShufflePALIGNRImmediate(ShuffleVectorSDNode *SVOp) { static unsigned getShufflePALIGNRImmediate(ShuffleVectorSDNode *SVOp) {
return getShuffleAlignrImmediate(SVOp, false); return getShuffleAlignrImmediate(SVOp, false);
} }
/// \brief Return the appropriate immediate to shuffle the specified
/// VECTOR_SHUFFLE mask with the VALIGN instruction.
static unsigned getShuffleVALIGNImmediate(ShuffleVectorSDNode *SVOp) { static unsigned getShuffleVALIGNImmediate(ShuffleVectorSDNode *SVOp) {
return getShuffleAlignrImmediate(SVOp, true); return getShuffleAlignrImmediate(SVOp, true);
} }