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ARM / Mac OS X also wants to invalidate icache after jitting.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59291 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2008-11-14 02:33:17 +00:00
parent 59d5f1d13b
commit c663beecdb
1 changed files with 20 additions and 18 deletions
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14
lib/System/Memory.cpp
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@ -35,12 +35,15 @@ extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
size_t Len) {
// icache invalidation for PPC.
#if (defined(__POWERPC__) || defined (__ppc__) || \
defined(_POWER) || defined(_ARCH_PPC))
// icache invalidation for PPC and ARM.
#if defined(__APPLE__)
#if (defined(__POWERPC__) || defined (__ppc__) || \
defined(_POWER) || defined(_ARCH_PPC)) || defined(__arm__)
sys_icache_invalidate(Addr, Len);
#elif defined(__GNUC__)
#endif
#else
#if (defined(__POWERPC__) || defined (__ppc__) || \
defined(_POWER) || defined(_ARCH_PPC)) && defined(__GNUC__)
const size_t LineSize = 32;
const intptr_t Mask = ~(LineSize - 1);
@ -55,6 +58,5 @@ void llvm::sys::Memory::InvalidateInstructionCache(const void *Addr,
asm volatile("icbi 0, %0" : : "r"(Line));
asm volatile("isync");
#endif
#endif // end PPC
#endif // end apple
}