From c68ccc1a702a5612de3f1e4d03cce66a7fae9de9 Mon Sep 17 00:00:00 2001
From: Sanjay Patel <spatel@rotateright.com>
Date: Thu, 9 Jul 2015 22:58:39 +0000
Subject: [PATCH] [x86] enable machine combiner reassociations for scalar
 double-precision multiplies

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241873 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86InstrInfo.cpp      |  4 +++-
 test/CodeGen/X86/machine-combiner.ll | 23 +++++++++++++++++++++++
 2 files changed, 26 insertions(+), 1 deletion(-)

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index fdfdac90033..5dbe7984e41 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -6404,7 +6404,7 @@ static bool hasReassocSibling(const MachineInstr &Inst, bool &Commuted) {
 }
 
 // TODO: There are many more machine instruction opcodes to match:
-//       1. Other data types (double, integer, vectors)
+//       1. Other data types (integer, vectors)
 //       2. Other math / logic operations (and, or)
 static bool isAssociativeAndCommutative(unsigned Opcode) {
   switch (Opcode) {
@@ -6412,7 +6412,9 @@ static bool isAssociativeAndCommutative(unsigned Opcode) {
   case X86::ADDSSrr:
   case X86::VADDSDrr:
   case X86::VADDSSrr:
+  case X86::MULSDrr:
   case X86::MULSSrr:
+  case X86::VMULSDrr:
   case X86::VMULSSrr:
     return true;
   default:
diff --git a/test/CodeGen/X86/machine-combiner.ll b/test/CodeGen/X86/machine-combiner.ll
index ae059a1ed08..0943bebbb09 100644
--- a/test/CodeGen/X86/machine-combiner.ll
+++ b/test/CodeGen/X86/machine-combiner.ll
@@ -187,3 +187,26 @@ define double @reassociate_adds_double(double %x0, double %x1, double %x2, doubl
   %t2 = fadd double %x3, %t1
   ret double %t2
 }
+
+; Verify that SSE and AVX scalar double-precison multiplies are reassociated.
+
+define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {
+; SSE-LABEL: reassociate_muls_double:
+; SSE:       # BB#0:
+; SSE-NEXT:    divsd %xmm1, %xmm0
+; SSE-NEXT:    mulsd %xmm3, %xmm2
+; SSE-NEXT:    mulsd %xmm2, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: reassociate_muls_double:
+; AVX:       # BB#0:
+; AVX-NEXT:    vdivsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    vmulsd %xmm3, %xmm2, %xmm1
+; AVX-NEXT:    vmulsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT:    retq
+  %t0 = fdiv double %x0, %x1
+  %t1 = fmul double %x2, %t0
+  %t2 = fmul double %x3, %t1
+  ret double %t2
+}
+