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r70270 isn't ready yet. Back this out. Sorry for the noise.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70275 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bill Wendling
2009-04-28 01:04:53 +00:00
parent 2e9d5f912a
commit c69d56f115
93 changed files with 347 additions and 394 deletions
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12
include/llvm/CodeGen/SchedulerRegistry.h
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@@ -32,7 +32,7 @@ class MachineBasicBlock;
class RegisterScheduler : public MachinePassRegistryNode {
public:
typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, unsigned);
typedef ScheduleDAGSDNodes *(*FunctionPassCtor)(SelectionDAGISel*, bool);
static MachinePassRegistry Registry;
@@ -64,27 +64,27 @@ public:
/// createBURRListDAGScheduler - This creates a bottom up register usage
/// reduction list scheduler.
ScheduleDAGSDNodes *createBURRListDAGScheduler(SelectionDAGISel *IS,
unsigned OptLevel);
bool Fast);
/// createTDRRListDAGScheduler - This creates a top down register usage
/// reduction list scheduler.
ScheduleDAGSDNodes *createTDRRListDAGScheduler(SelectionDAGISel *IS,
unsigned OptLevel);
bool Fast);
/// createTDListDAGScheduler - This creates a top-down list scheduler with
/// a hazard recognizer.
ScheduleDAGSDNodes *createTDListDAGScheduler(SelectionDAGISel *IS,
unsigned OptLevel);
bool Fast);
/// createFastDAGScheduler - This creates a "fast" scheduler.
///
ScheduleDAGSDNodes *createFastDAGScheduler(SelectionDAGISel *IS,
unsigned OptLevel);
bool Fast);
/// createDefaultScheduler - This creates an instruction scheduler appropriate
/// for the target.
ScheduleDAGSDNodes *createDefaultScheduler(SelectionDAGISel *IS,
unsigned OptLevel);
bool Fast);
} // end namespace llvm