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R600: Put PRED_X instruction in its own clause
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191789 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -173,6 +173,14 @@ private:
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if (AluInstCount > TII->getMaxAlusPerClause())
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if (AluInstCount > TII->getMaxAlusPerClause())
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break;
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break;
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if (I->getOpcode() == AMDGPU::PRED_X) {
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if (I->getOpcode() == AMDGPU::PRED_X) {
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// We put PRED_X in its own clause to ensure that ifcvt won't create
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// clauses with more than 128 insts.
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// IfCvt is indeed checking that "then" and "else" branches of an if
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// statement have less than ~60 insts thus converted clauses can't be
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// bigger than ~121 insts (predicate setter needs to be in the same
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// clause as predicated alus).
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if (AluInstCount > 0)
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break;
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if (TII->getFlagOp(I).getImm() & MO_FLAG_PUSH)
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if (TII->getFlagOp(I).getImm() & MO_FLAG_PUSH)
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PushBeforeModifier = true;
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PushBeforeModifier = true;
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AluInstCount ++;
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AluInstCount ++;
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1177
test/CodeGen/R600/big_alu.ll
Normal file
1177
test/CodeGen/R600/big_alu.ll
Normal file
File diff suppressed because it is too large
Load Diff
@ -1,6 +1,6 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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; CHECK: JUMP @5
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; CHECK: JUMP @10
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; CHECK: EXPORT
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; CHECK: EXPORT
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; CHECK-NOT: EXPORT
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; CHECK-NOT: EXPORT
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@ -1,9 +1,9 @@
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
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;CHECK: ALU_PUSH
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;CHECK: ALU_PUSH
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;CHECK: LOOP_START_DX10 @11
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;CHECK: LOOP_START_DX10 @13
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;CHECK: LOOP_BREAK @10
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;CHECK: LOOP_BREAK @12
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;CHECK: POP @10
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;CHECK: POP @12
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64"
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target triple = "r600--"
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target triple = "r600--"
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@ -30,8 +30,7 @@ ENDIF:
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; CHECK: @test_b
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; CHECK: @test_b
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; CHECK: SET{{[GTEQN]+}}_DX10
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; CHECK: SET{{[GTEQN]+}}_DX10
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; CHECK-NEXT: PRED_
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; CHECK: PRED_
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; CHECK-NEXT: ALU clause starting
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define void @test_b(i32 addrspace(1)* %out, float %in) {
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define void @test_b(i32 addrspace(1)* %out, float %in) {
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entry:
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entry:
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%0 = fcmp olt float %in, 0.0
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%0 = fcmp olt float %in, 0.0
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