6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity

After a custom inserter, in a block which has constant instructions,

Browse Source 
update the current basic block in addition to the current insert
position, so that they remain consistent. This fixes rdar://8204072.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108765 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Dan Gohman 2010-07-19 22:48:56 +00:00
parent d70f57b254
commit c6e59b71f5
2 changed files with 17 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
lib/CodeGen/SelectionDAG/FastISel.cpp
View File

@ -276,6 +276,7 @@ std::pair<unsigned, bool> FastISel::getRegForGEPIndex(const Value *Idx) {
void FastISel::recomputeInsertPt() {
if (getLastLocalValue()) {
FuncInfo.InsertPt = getLastLocalValue();
FuncInfo.MBB = FuncInfo.InsertPt->getParent();
++FuncInfo.InsertPt;
} else
FuncInfo.InsertPt = FuncInfo.MBB->getFirstNonPHI();

16
test/CodeGen/X86/fast-isel-atomic.ll Normal file
View File

@ -0,0 +1,16 @@
; RUN: llc < %s -O0 -march=x86-64
; rdar://8204072
@sc = external global i8
@uc = external global i8
declare i8 @llvm.atomic.load.and.i8.p0i8(i8* nocapture, i8) nounwind
define void @test_fetch_and_op() nounwind {
entry:
%tmp40 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @sc, i8 11) ; <i8> [#uses=1]
store i8 %tmp40, i8* @sc
%tmp41 = call i8 @llvm.atomic.load.and.i8.p0i8(i8* @uc, i8 11) ; <i8> [#uses=1]
store i8 %tmp41, i8* @uc
ret void
}