From c6e743049983dca1c6904610fa3cb78bda39d67c Mon Sep 17 00:00:00 2001
From: Misha Brukman <brukman+llvm@gmail.com>
Date: Sun, 26 Sep 2004 21:07:43 +0000
Subject: [PATCH] Fix the copy-pasto that Brian noticed: V8 int regs are
 32-bits wide, not 64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16518 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/SparcRegisterInfo.td     | 2 +-
 lib/Target/SparcV8/SparcV8RegisterInfo.td | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/Target/Sparc/SparcRegisterInfo.td b/lib/Target/Sparc/SparcRegisterInfo.td
index 6a4da69bd6b..728c115f861 100644
--- a/lib/Target/Sparc/SparcRegisterInfo.td
+++ b/lib/Target/Sparc/SparcRegisterInfo.td
@@ -23,7 +23,7 @@ include "../SparcRegisterInfo.td"
 // FIXME: the register order should be defined in terms of the preferred
 // allocation order...
 //
-def IntRegs : RegisterClass<i64, 64, [L0, L1, L2, L3, L4, L5, L6, L7,
+def IntRegs : RegisterClass<i32, 64, [L0, L1, L2, L3, L4, L5, L6, L7,
                                      I0, I1, I2, I3, I4, I5,
                                      G1, G2, G3, G4, G5, G6, G7,
                                      O0, O1, O2, O3, O4, O5, O7,
diff --git a/lib/Target/SparcV8/SparcV8RegisterInfo.td b/lib/Target/SparcV8/SparcV8RegisterInfo.td
index 6a4da69bd6b..728c115f861 100644
--- a/lib/Target/SparcV8/SparcV8RegisterInfo.td
+++ b/lib/Target/SparcV8/SparcV8RegisterInfo.td
@@ -23,7 +23,7 @@ include "../SparcRegisterInfo.td"
 // FIXME: the register order should be defined in terms of the preferred
 // allocation order...
 //
-def IntRegs : RegisterClass<i64, 64, [L0, L1, L2, L3, L4, L5, L6, L7,
+def IntRegs : RegisterClass<i32, 64, [L0, L1, L2, L3, L4, L5, L6, L7,
                                      I0, I1, I2, I3, I4, I5,
                                      G1, G2, G3, G4, G5, G6, G7,
                                      O0, O1, O2, O3, O4, O5, O7,