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Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192567 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2013-10-14 04:55:01 +00:00
parent 8e121843c1
commit c6f7c99809
8 changed files with 117 additions and 95 deletions
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3
utils/TableGen/X86RecognizableInstr.cpp
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@@ -1213,6 +1213,7 @@ OperandType RecognizableInstr::typeFromString(const std::string &s,
TYPE("i32i8imm", TYPE_IMM32)
TYPE("u32u8imm", TYPE_IMM32)
TYPE("GR32", TYPE_Rv)
TYPE("GR32orGR64", TYPE_R32)
TYPE("i64mem", TYPE_Mv)
TYPE("i64i32imm", TYPE_IMM64)
TYPE("i64i8imm", TYPE_IMM64)
@@ -1323,6 +1324,7 @@ OperandEncoding RecognizableInstr::rmRegisterEncodingFromString
bool hasOpSizePrefix) {
ENCODING("GR16", ENCODING_RM)
ENCODING("GR32", ENCODING_RM)
ENCODING("GR32orGR64", ENCODING_RM)
ENCODING("GR64", ENCODING_RM)
ENCODING("GR8", ENCODING_RM)
ENCODING("VR128", ENCODING_RM)
@@ -1346,6 +1348,7 @@ OperandEncoding RecognizableInstr::roRegisterEncodingFromString
bool hasOpSizePrefix) {
ENCODING("GR16", ENCODING_REG)
ENCODING("GR32", ENCODING_REG)
ENCODING("GR32orGR64", ENCODING_REG)
ENCODING("GR64", ENCODING_REG)
ENCODING("GR8", ENCODING_REG)
ENCODING("VR128", ENCODING_REG)