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Catch another case where SD fails to propagate node order.
I need to handle this for the test case in my following scheduler commit. Work is already under way to redesign the mechanism for node order propagation because this case by case approach is unmaintainable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179448 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1720,7 +1720,7 @@ SDNode *X86DAGToDAGISel::SelectAtomicLoadArith(SDNode *Node, EVT NVT) {
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Op = ADD;
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break;
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}
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Val = getAtomicLoadArithTargetConstant(CurDAG, dl, Op, NVT, Val);
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bool isUnOp = !Val.getNode();
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bool isCN = Val.getNode() && (Val.getOpcode() == ISD::TargetConstant);
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@ -2343,6 +2343,9 @@ SDNode *X86DAGToDAGISel::Select(SDNode *Node) {
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DEBUG(dbgs() << "=> "; ResHi.getNode()->dump(CurDAG); dbgs() << '\n');
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}
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// Propagate ordering to the last node, for now.
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CurDAG->AssignOrdering(InFlag.getNode(), CurDAG->GetOrdering(Node));
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return NULL;
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}
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