mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 07:34:33 +00:00
Handle cases where the post-RA scheduler may move instructions between the
address calculation instructions leading up to a jump table when we're trying to convert them into a TB[H] instruction in Thumb2. This realistically shouldn't happen much, if at all, for well formed inputs, but it's more correct to handle it. rdar://7387682 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107830 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
da3051a17f
commit
c7937ae025
@ -1661,15 +1661,25 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
|
|||||||
continue;
|
continue;
|
||||||
unsigned IdxReg = MI->getOperand(1).getReg();
|
unsigned IdxReg = MI->getOperand(1).getReg();
|
||||||
bool IdxRegKill = MI->getOperand(1).isKill();
|
bool IdxRegKill = MI->getOperand(1).isKill();
|
||||||
|
|
||||||
|
// Scan backwards to find the instruction that defines the base
|
||||||
|
// register. Due to post-RA scheduling, we can't count on it
|
||||||
|
// immediately preceding the branch instruction.
|
||||||
MachineBasicBlock::iterator PrevI = MI;
|
MachineBasicBlock::iterator PrevI = MI;
|
||||||
if (PrevI == MBB->begin())
|
MachineBasicBlock::iterator B = MBB->begin();
|
||||||
|
while (PrevI != B && !PrevI->definesRegister(BaseReg))
|
||||||
|
--PrevI;
|
||||||
|
|
||||||
|
// If for some reason we didn't find it, we can't do anything, so
|
||||||
|
// just skip this one.
|
||||||
|
if (!PrevI->definesRegister(BaseReg))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
MachineInstr *AddrMI = --PrevI;
|
MachineInstr *AddrMI = PrevI;
|
||||||
bool OptOk = true;
|
bool OptOk = true;
|
||||||
// Examine the instruction that calculates the jumptable entry address.
|
// Examine the instruction that calculates the jumptable entry address.
|
||||||
// If it's not the one just before the t2BR_JT, we won't delete it, then
|
// Make sure it only defines the base register and kills any uses
|
||||||
// it's not worth doing the optimization.
|
// other than the index register.
|
||||||
for (unsigned k = 0, eee = AddrMI->getNumOperands(); k != eee; ++k) {
|
for (unsigned k = 0, eee = AddrMI->getNumOperands(); k != eee; ++k) {
|
||||||
const MachineOperand &MO = AddrMI->getOperand(k);
|
const MachineOperand &MO = AddrMI->getOperand(k);
|
||||||
if (!MO.isReg() || !MO.getReg())
|
if (!MO.isReg() || !MO.getReg())
|
||||||
@ -1686,9 +1696,14 @@ bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
|
|||||||
if (!OptOk)
|
if (!OptOk)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
// The previous instruction should be a tLEApcrel or t2LEApcrelJT, we want
|
// Now scan back again to find the tLEApcrel or t2LEApcrelJT instruction
|
||||||
|
// that gave us the initial base register definition.
|
||||||
|
for (--PrevI; PrevI != B && !PrevI->definesRegister(BaseReg); --PrevI)
|
||||||
|
;
|
||||||
|
|
||||||
|
// The instruction should be a tLEApcrel or t2LEApcrelJT; we want
|
||||||
// to delete it as well.
|
// to delete it as well.
|
||||||
MachineInstr *LeaMI = --PrevI;
|
MachineInstr *LeaMI = PrevI;
|
||||||
if ((LeaMI->getOpcode() != ARM::tLEApcrelJT &&
|
if ((LeaMI->getOpcode() != ARM::tLEApcrelJT &&
|
||||||
LeaMI->getOpcode() != ARM::t2LEApcrelJT) ||
|
LeaMI->getOpcode() != ARM::t2LEApcrelJT) ||
|
||||||
LeaMI->getOperand(0).getReg() != BaseReg)
|
LeaMI->getOperand(0).getReg() != BaseReg)
|
||||||
|
Loading…
x
Reference in New Issue
Block a user