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[X86, AVX] add an exedepfix entry for vmovq == vmovlps == vmovlpd
This is the AVX extension of r235014: http://llvm.org/viewvc/llvm-project?view=revision&revision=235014 Review: http://reviews.llvm.org/D8691 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235210 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -6015,7 +6015,7 @@ static const uint16_t ReplaceableInstrs[][3] = {
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{ X86::VMOVAPSrr, X86::VMOVAPDrr, X86::VMOVDQArr },
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{ X86::VMOVAPSrr, X86::VMOVAPDrr, X86::VMOVDQArr },
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{ X86::VMOVUPSmr, X86::VMOVUPDmr, X86::VMOVDQUmr },
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{ X86::VMOVUPSmr, X86::VMOVUPDmr, X86::VMOVDQUmr },
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{ X86::VMOVUPSrm, X86::VMOVUPDrm, X86::VMOVDQUrm },
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{ X86::VMOVUPSrm, X86::VMOVUPDrm, X86::VMOVDQUrm },
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// TODO: Add the AVX versions of MOVLPSmr
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{ X86::VMOVLPSmr, X86::VMOVLPDmr, X86::VMOVPQI2QImr },
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{ X86::VMOVNTPSmr, X86::VMOVNTPDmr, X86::VMOVNTDQmr },
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{ X86::VMOVNTPSmr, X86::VMOVNTPDmr, X86::VMOVNTDQmr },
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{ X86::VANDNPSrm, X86::VANDNPDrm, X86::VPANDNrm },
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{ X86::VANDNPSrm, X86::VANDNPDrm, X86::VPANDNrm },
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{ X86::VANDNPSrr, X86::VANDNPDrr, X86::VPANDNrr },
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{ X86::VANDNPSrr, X86::VANDNPDrr, X86::VPANDNrr },
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@ -856,7 +856,7 @@ define void @test_x86_sse2_storel_dq(i8* %a0, <4 x i32> %a1) {
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; CHECK-LABEL: test_x86_sse2_storel_dq:
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; CHECK-LABEL: test_x86_sse2_storel_dq:
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; CHECK: # BB#0:
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; CHECK: # BB#0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: vmovq %xmm0, (%eax)
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; CHECK-NEXT: vmovlps %xmm0, (%eax)
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; CHECK-NEXT: retl
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; CHECK-NEXT: retl
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call void @llvm.x86.sse2.storel.dq(i8* %a0, <4 x i32> %a1)
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call void @llvm.x86.sse2.storel.dq(i8* %a0, <4 x i32> %a1)
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ret void
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ret void
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@ -19,12 +19,7 @@ define void @store_floats(<4 x float> %x, i64* %p) {
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; AVX-LABEL: store_floats:
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; AVX-LABEL: store_floats:
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; AVX: # BB#0:
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; AVX: # BB#0:
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; AVX-NEXT: vaddps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vaddps %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovlps %xmm0, (%rdi)
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; !!! FIXME - the AVX version is not handled correctly.
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; AVX-NEXT: vmovq %xmm0, (%rdi)
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; AVX-NEXT: retq
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; AVX-NEXT: retq
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%a = fadd <4 x float> %x, %x
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%a = fadd <4 x float> %x, %x
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%b = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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%b = shufflevector <4 x float> %a, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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@ -28,7 +28,7 @@
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; Swap Imm and Real.
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; Swap Imm and Real.
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; STRESS-NEXT: vinsertps $16, [[RES_Imm]], [[RES_Real]], [[RES_Vec:%xmm[0-9]+]]
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; STRESS-NEXT: vinsertps $16, [[RES_Imm]], [[RES_Real]], [[RES_Vec:%xmm[0-9]+]]
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; Put the results back into out[out_start].
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; Put the results back into out[out_start].
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; STRESS-NEXT: vmovq [[RES_Vec]], ([[BASE]])
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; STRESS-NEXT: vmovlps [[RES_Vec]], ([[BASE]])
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;
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;
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; Same for REGULAR, we eliminate register bank copy with each slices.
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; Same for REGULAR, we eliminate register bank copy with each slices.
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; REGULAR-LABEL: t1:
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; REGULAR-LABEL: t1:
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@ -43,7 +43,7 @@
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; Swap Imm and Real.
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; Swap Imm and Real.
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; REGULAR-NEXT: vinsertps $16, [[RES_Imm]], [[RES_Real]], [[RES_Vec:%xmm[0-9]+]]
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; REGULAR-NEXT: vinsertps $16, [[RES_Imm]], [[RES_Real]], [[RES_Vec:%xmm[0-9]+]]
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; Put the results back into out[out_start].
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; Put the results back into out[out_start].
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; REGULAR-NEXT: vmovq [[RES_Vec]], ([[BASE]])
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; REGULAR-NEXT: vmovlps [[RES_Vec]], ([[BASE]])
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define void @t1(%class.Complex* nocapture %out, i64 %out_start) {
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define void @t1(%class.Complex* nocapture %out, i64 %out_start) {
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entry:
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entry:
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%arrayidx = getelementptr inbounds %class.Complex, %class.Complex* %out, i64 %out_start
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%arrayidx = getelementptr inbounds %class.Complex, %class.Complex* %out, i64 %out_start
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@ -9,8 +9,8 @@
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; SSE: movaps %xmm0, (%rsp)
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; SSE: movaps %xmm0, (%rsp)
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; SSE: callq killcommon
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; SSE: callq killcommon
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; AVX: vmovdqa compl+128(%rip), %xmm0
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; AVX: vmovaps compl+128(%rip), %xmm0
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; AVX: vmovdqa %xmm0, (%rsp)
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; AVX: vmovaps %xmm0, (%rsp)
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; AVX: callq killcommon
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; AVX: callq killcommon
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@compl = linkonce global [20 x i64] zeroinitializer, align 64 ; <[20 x i64]*> [#uses=1]
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@compl = linkonce global [20 x i64] zeroinitializer, align 64 ; <[20 x i64]*> [#uses=1]
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