6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-21 02:29:22 +00:00
Code Issues Projects Releases Wiki Activity

Register allocator: set CSRFirstUseCost to 5 for ARM64.

Browse Source 
A value of 5 means if we have a split or spill option that has a really
low cost (1 << 14 is the entry frequency), we will choose to spill
or split the really cold path before using a callee-saved register.

This gives us the performance benefit on SPECInt2k and is also conservative.

rdar://16162005


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205248 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Manman Ren 2014-03-31 21:06:36 +00:00
parent 8d8c507bbf
commit c7e0a8178a
1 changed files with 7 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
lib/Target/ARM64/ARM64RegisterInfo.h
View File

@ -40,6 +40,13 @@ public:
getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
unsigned getCSRFirstUseCost() const {
// The cost will be compared against BlockFrequency where entry has the
// value of 1 << 14. A value of 5 will choose to spill or split really
// cold path instead of using a callee-saved register.
return 5;
}
// Calls involved in thread-local variable lookup save more registers than
// normal calls, so they need a different mask to represent this.
const uint32_t *getTLSCallPreservedMask() const;