[mips][msa] A small refactor to reduce patch noise in my next commit

No functional change. An if-statement has been split into two nested if-statements.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195972 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Daniel Sanders 2013-11-30 13:15:21 +00:00
parent 1baf0c0924
commit c7ff23aa67

View File

@ -113,13 +113,14 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
// If MI is not a debug value, make sure Offset fits in the 16-bit immediate
// field.
if (!MI.isDebugValue() && !isInt<16>(Offset)) {
if (!MI.isDebugValue()) {
if (!isInt<16>(Offset)) {
MachineBasicBlock &MBB = *MI.getParent();
DebugLoc DL = II->getDebugLoc();
unsigned ADDu = Subtarget.isABI_N64() ? Mips::DADDu : Mips::ADDu;
unsigned NewImm;
const MipsSEInstrInfo &TII =
*static_cast<const MipsSEInstrInfo*>(
*static_cast<const MipsSEInstrInfo *>(
MBB.getParent()->getTarget().getInstrInfo());
unsigned Reg = TII.loadImmediate(Offset, MBB, II, DL, &NewImm);
BuildMI(MBB, II, DL, TII.get(ADDu), Reg).addReg(FrameReg)
@ -129,6 +130,7 @@ void MipsSERegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
Offset = SignExtend64<16>(NewImm);
IsKill = true;
}
}
MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);