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rdar://12329730 (2nd part)
This change tries to simmplify E1 = " X >> C1 << C2" into : - E2 = "X << (C2 - C1)" if C2 > C1, or - E2 = "X >> (C1 - C2)" if C1 > C2, or - E2 = X if C1 == C2. Reviewed by Nadav. Thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169182 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -327,6 +327,11 @@ private:
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bool SimplifyDemandedBits(Use &U, APInt DemandedMask,
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APInt& KnownZero, APInt& KnownOne,
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unsigned Depth=0);
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/// Helper routine of SimplifyDemandedUseBits. It tries to simplify demanded
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/// bit for "r1 = shr x, c1; r2 = shl r1, c2" instruction sequence.
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Value *SimplifyShrShlDemandedBits(Instruction *Lsr, Instruction *Sftl,
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APInt DemandedMask, APInt &KnownZero,
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APInt &KnownOne);
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/// SimplifyDemandedInstructionBits - Inst is an integer instruction that
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/// SimplifyDemandedBits knows about. See if the instruction has any
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@ -16,9 +16,10 @@
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#include "InstCombine.h"
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#include "llvm/DataLayout.h"
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#include "llvm/IntrinsicInst.h"
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#include "llvm/Support/PatternMatch.h"
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using namespace llvm;
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using namespace llvm::PatternMatch;
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/// ShrinkDemandedConstant - Check to see if the specified operand of the
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/// specified instruction is a constant integer. If so, check to see if there
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@ -580,6 +581,17 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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break;
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case Instruction::Shl:
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if (ConstantInt *SA = dyn_cast<ConstantInt>(I->getOperand(1))) {
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{
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Value *VarX; ConstantInt *C1;
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if (match(I->getOperand(0), m_Shr(m_Value(VarX), m_ConstantInt(C1)))) {
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Instruction *Shr = cast<Instruction>(I->getOperand(0));
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Value *R = SimplifyShrShlDemandedBits(Shr, I, DemandedMask,
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KnownZero, KnownOne);
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if (R)
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return R;
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}
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}
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uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1);
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APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
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@ -800,6 +812,78 @@ Value *InstCombiner::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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return 0;
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}
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/// Helper routine of SimplifyDemandedUseBits. It tries to simplify
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/// "E1 = (X lsr C1) << C2", where the C1 and C2 are constant, into
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/// "E2 = X << (C2 - C1)" or "E2 = X >> (C1 - C2)", depending on the sign
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/// of "C2-C1".
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///
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/// Suppose E1 and E2 are generally different in bits S={bm, bm+1,
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/// ..., bn}, without considering the specific value X is holding.
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/// This transformation is legal iff one of following conditions is hold:
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/// 1) All the bit in S are 0, in this case E1 == E2.
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/// 2) We don't care those bits in S, per the input DemandedMask.
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/// 3) Combination of 1) and 2). Some bits in S are 0, and we don't care the
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/// rest bits.
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///
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/// Currently we only test condition 2).
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///
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/// As with SimplifyDemandedUseBits, it returns NULL if the simplification was
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/// not successful.
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Value *InstCombiner::SimplifyShrShlDemandedBits(Instruction *Shr,
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Instruction *Shl, APInt DemandedMask, APInt &KnownZero, APInt &KnownOne) {
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unsigned ShlAmt = cast<ConstantInt>(Shl->getOperand(1))->getZExtValue();
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unsigned ShrAmt = cast<ConstantInt>(Shr->getOperand(1))->getZExtValue();
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KnownOne.clearAllBits();
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KnownZero = APInt::getBitsSet(KnownZero.getBitWidth(), 0, ShlAmt-1);
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KnownZero &= DemandedMask;
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if (ShlAmt == 0 || ShrAmt == 0)
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return 0;
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Value *VarX = Shr->getOperand(0);
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Type *Ty = VarX->getType();
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APInt BitMask1(Ty->getIntegerBitWidth(), (uint64_t)-1);
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APInt BitMask2(Ty->getIntegerBitWidth(), (uint64_t)-1);
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bool isLshr = (Shr->getOpcode() == Instruction::LShr);
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BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt) :
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(BitMask1.ashr(ShrAmt) << ShlAmt);
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if (ShrAmt <= ShlAmt) {
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BitMask2 <<= (ShlAmt - ShrAmt);
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} else {
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BitMask2 = isLshr ? BitMask2.lshr(ShrAmt - ShlAmt):
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BitMask2.ashr(ShrAmt - ShlAmt);
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}
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// Check if condition-2 (see the comment to this function) is satified.
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if ((BitMask1 & DemandedMask) == (BitMask2 & DemandedMask)) {
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if (ShrAmt == ShlAmt)
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return VarX;
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if (!Shr->hasOneUse())
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return 0;
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BinaryOperator *New;
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if (ShrAmt < ShlAmt) {
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Constant *Amt = ConstantInt::get(VarX->getType(), ShlAmt - ShrAmt);
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New = BinaryOperator::CreateShl(VarX, Amt);
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BinaryOperator *Orig = cast<BinaryOperator>(Shl);
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New->setHasNoSignedWrap(Orig->hasNoSignedWrap());
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New->setHasNoUnsignedWrap(Orig->hasNoUnsignedWrap());
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} else {
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Constant *Amt = ConstantInt::get(VarX->getType(), ShrAmt - ShlAmt);
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New = BinaryOperator::CreateLShr(VarX, Amt);
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}
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return InsertNewInstWith(New, *Shl);
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}
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return 0;
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}
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/// SimplifyDemandedVectorElts - The specified value produces a vector with
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/// any number of elements. DemandedElts contains the set of elements that are
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@ -5,8 +5,8 @@
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define i32 @main(i32 %argc) nounwind ssp {
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entry:
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%tmp3151 = trunc i32 %argc to i8
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; CHECK: %tmp3163 = shl i8 %tmp3162, 6
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; CHECK: and i8 %tmp3163, 64
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; CHECK: %tmp3162 = shl i8 %tmp3151, 5
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; CHECK: and i8 %tmp3162, 64
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; CHECK-NOT: shl
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; CHECK-NOT: shr
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%tmp3161 = or i8 %tmp3151, -17
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@ -659,3 +659,79 @@ define i32 @test53(i32 %x) {
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; CHECK-NEXT: %B = shl nuw i32 %x, 2
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; CHECK-NEXT: ret i32 %B
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}
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define i32 @test54(i32 %x) {
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%shr2 = lshr i32 %x, 1
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%shl = shl i32 %shr2, 4
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%and = and i32 %shl, 16
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ret i32 %and
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; CHECK: @test54
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; CHECK: shl i32 %x, 3
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}
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define i32 @test55(i32 %x) {
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%shr2 = lshr i32 %x, 1
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%shl = shl i32 %shr2, 4
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%or = or i32 %shl, 8
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ret i32 %or
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; CHECK: @test55
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; CHECK: shl i32 %x, 3
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}
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define i32 @test56(i32 %x) {
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%shr2 = lshr i32 %x, 1
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%shl = shl i32 %shr2, 4
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%or = or i32 %shl, 7
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ret i32 %or
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; CHECK: @test56
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; CHECK: shl i32 %shr2, 4
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}
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define i32 @test57(i32 %x) {
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%shr = lshr i32 %x, 1
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%shl = shl i32 %shr, 4
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%and = and i32 %shl, 16
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ret i32 %and
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; CHECK: @test57
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; CHECK: shl i32 %x, 3
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}
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define i32 @test58(i32 %x) {
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%shr = lshr i32 %x, 1
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%shl = shl i32 %shr, 4
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%or = or i32 %shl, 8
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ret i32 %or
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; CHECK: @test58
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; CHECK: shl i32 %x, 3
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}
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define i32 @test59(i32 %x) {
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%shr = ashr i32 %x, 1
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%shl = shl i32 %shr, 4
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%or = or i32 %shl, 7
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ret i32 %or
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; CHECK: @test59
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; CHECK: %shl = shl i32 %shr1, 4
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}
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define i32 @test60(i32 %x) {
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%shr = ashr i32 %x, 4
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%shl = shl i32 %shr, 1
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%or = or i32 %shl, 1
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ret i32 %or
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; CHECK: @test60
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; CHECK: lshr i32 %x, 3
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}
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define i32 @test61(i32 %x) {
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%shr = ashr i32 %x, 4
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%shl = shl i32 %shr, 1
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%or = or i32 %shl, 2
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ret i32 %or
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; CHECK: @test61
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; CHECK: ashr i32 %x, 4
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}
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%sub = add i32 %xor, -67108864 ; <i32> [#uses=1]
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ret i32 %sub
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; CHECK: @test8
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; CHECK: %shr = ashr i32 %x, 5
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; CHECK: ret i32 %shr
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; CHECK: %sub = ashr i32 %x, 5
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; CHECK: ret i32 %sub
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}
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