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https://github.com/c64scene-ar/llvm-6502.git
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Make getMachineNode return a MachineSDNode* instead of a generic SDNode*
since it won't do any folding. This will help avoid some inconvenient casting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83698 91177308-0d34-0410-b5e6-96231b3b80d8
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c81b783e27
@ -672,35 +672,36 @@ public:
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/// Note that getMachineNode returns the resultant node. If there is already
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/// Note that getMachineNode returns the resultant node. If there is already
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/// a node of the specified opcode and operands, it returns that node instead
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/// a node of the specified opcode and operands, it returns that node instead
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/// of the current one.
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/// of the current one.
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT);
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1);
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1,
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SDValue Op1);
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SDValue Op2);
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op1, SDValue Op2);
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op1, SDValue Op2, SDValue Op3);
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SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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const SDValue *Ops, unsigned NumOps);
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const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2);
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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SDValue Op1);
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SDValue Op1);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2);
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EVT VT2, SDValue Op1, SDValue Op2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
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EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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const SDValue *Ops, unsigned NumOps);
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const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, SDValue Op1, SDValue Op2);
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EVT VT3, SDValue Op1, SDValue Op2);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3);
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EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, const SDValue *Ops, unsigned NumOps);
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EVT VT3, const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2,
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EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps);
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EVT VT3, EVT VT4, const SDValue *Ops, unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl,
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const std::vector<EVT> &ResultTys, const SDValue *Ops,
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const std::vector<EVT> &ResultTys, const SDValue *Ops,
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unsigned NumOps);
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unsigned NumOps);
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SDNode *getMachineNode(unsigned Opcode, DebugLoc dl, SDVTList VTs,
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MachineSDNode *getMachineNode(unsigned Opcode, DebugLoc dl, SDVTList VTs,
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const SDValue *Ops, unsigned NumOps);
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const SDValue *Ops, unsigned NumOps);
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/// getTargetExtractSubreg - A convenience function for creating
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/// getTargetExtractSubreg - A convenience function for creating
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@ -4612,115 +4612,126 @@ SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
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/// Note that getMachineNode returns the resultant node. If there is already a
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/// Note that getMachineNode returns the resultant node. If there is already a
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/// node of the specified opcode and operands, it returns that node instead of
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/// node of the specified opcode and operands, it returns that node instead of
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/// the current one.
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/// the current one.
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
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MachineSDNode *
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT) {
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SDVTList VTs = getVTList(VT);
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SDVTList VTs = getVTList(VT);
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return getMachineNode(Opcode, dl, VTs, 0, 0);
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return getMachineNode(Opcode, dl, VTs, 0, 0);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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MachineSDNode *
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SDValue Op1) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT, SDValue Op1) {
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SDVTList VTs = getVTList(VT);
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SDVTList VTs = getVTList(VT);
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SDValue Ops[] = { Op1 };
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SDValue Ops[] = { Op1 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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MachineSDNode *
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SDValue Op1, SDValue Op2) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op1, SDValue Op2) {
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SDVTList VTs = getVTList(VT);
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SDVTList VTs = getVTList(VT);
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SDValue Ops[] = { Op1, Op2 };
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SDValue Ops[] = { Op1, Op2 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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MachineSDNode *
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SDValue Op1, SDValue Op2,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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SDValue Op3) {
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SDValue Op1, SDValue Op2, SDValue Op3) {
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SDVTList VTs = getVTList(VT);
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SDVTList VTs = getVTList(VT);
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SDValue Ops[] = { Op1, Op2, Op3 };
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SDValue Ops[] = { Op1, Op2, Op3 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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MachineSDNode *
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const SDValue *Ops, unsigned NumOps) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT,
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const SDValue *Ops, unsigned NumOps) {
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SDVTList VTs = getVTList(VT);
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SDVTList VTs = getVTList(VT);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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EVT VT1, EVT VT2) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1, EVT VT2) {
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SDVTList VTs = getVTList(VT1, VT2);
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SDVTList VTs = getVTList(VT1, VT2);
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return getMachineNode(Opcode, dl, VTs, 0, 0);
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return getMachineNode(Opcode, dl, VTs, 0, 0);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *
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EVT VT2, SDValue Op1) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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EVT VT1, EVT VT2, SDValue Op1) {
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SDVTList VTs = getVTList(VT1, VT2);
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SDVTList VTs = getVTList(VT1, VT2);
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SDValue Ops[] = { Op1 };
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SDValue Ops[] = { Op1 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *
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EVT VT2, SDValue Op1,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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SDValue Op2) {
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EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
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SDVTList VTs = getVTList(VT1, VT2);
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SDVTList VTs = getVTList(VT1, VT2);
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SDValue Ops[] = { Op1, Op2 };
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SDValue Ops[] = { Op1, Op2 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *
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EVT VT2, SDValue Op1,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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SDValue Op2, SDValue Op3) {
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EVT VT1, EVT VT2, SDValue Op1,
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SDValue Op2, SDValue Op3) {
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SDVTList VTs = getVTList(VT1, VT2);
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SDVTList VTs = getVTList(VT1, VT2);
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SDValue Ops[] = { Op1, Op2, Op3 };
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SDValue Ops[] = { Op1, Op2, Op3 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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EVT VT1, EVT VT2,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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const SDValue *Ops, unsigned NumOps) {
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EVT VT1, EVT VT2,
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const SDValue *Ops, unsigned NumOps) {
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SDVTList VTs = getVTList(VT1, VT2);
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SDVTList VTs = getVTList(VT1, VT2);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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EVT VT1, EVT VT2, EVT VT3,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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SDValue Op1, SDValue Op2) {
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EVT VT1, EVT VT2, EVT VT3,
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SDValue Op1, SDValue Op2) {
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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SDValue Ops[] = { Op1, Op2 };
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SDValue Ops[] = { Op1, Op2 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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EVT VT1, EVT VT2, EVT VT3,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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SDValue Op1, SDValue Op2,
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EVT VT1, EVT VT2, EVT VT3,
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SDValue Op3) {
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SDValue Op1, SDValue Op2, SDValue Op3) {
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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SDValue Ops[] = { Op1, Op2, Op3 };
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SDValue Ops[] = { Op1, Op2, Op3 };
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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return getMachineNode(Opcode, dl, VTs, Ops, array_lengthof(Ops));
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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EVT VT1, EVT VT2, EVT VT3,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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const SDValue *Ops, unsigned NumOps) {
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EVT VT1, EVT VT2, EVT VT3,
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const SDValue *Ops, unsigned NumOps) {
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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SDVTList VTs = getVTList(VT1, VT2, VT3);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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MachineSDNode *
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EVT VT2, EVT VT3, EVT VT4,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl, EVT VT1,
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const SDValue *Ops, unsigned NumOps) {
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EVT VT2, EVT VT3, EVT VT4,
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const SDValue *Ops, unsigned NumOps) {
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SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
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SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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MachineSDNode *
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const std::vector<EVT> &ResultTys,
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc dl,
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const SDValue *Ops, unsigned NumOps) {
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const std::vector<EVT> &ResultTys,
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const SDValue *Ops, unsigned NumOps) {
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SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
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SDVTList VTs = getVTList(&ResultTys[0], ResultTys.size());
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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return getMachineNode(Opcode, dl, VTs, Ops, NumOps);
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}
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}
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SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
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MachineSDNode *
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const SDValue *Ops, unsigned NumOps) {
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SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
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const SDValue *Ops, unsigned NumOps) {
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bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
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bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Flag;
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MachineSDNode *N;
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MachineSDNode *N;
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void *IP;
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void *IP;
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@ -4730,7 +4741,7 @@ SDNode *SelectionDAG::getMachineNode(unsigned Opcode, DebugLoc DL, SDVTList VTs,
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AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
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AddNodeIDNode(ID, ~Opcode, VTs, Ops, NumOps);
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IP = 0;
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IP = 0;
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
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return E;
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return cast<MachineSDNode>(E);
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}
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}
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// Allocate a new MachineSDNode.
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// Allocate a new MachineSDNode.
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