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The actual order of parameters in a 2-reg-immediate assembly instructions is
"rs1, imm, rd": most importantly, rd goes last. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@6456 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -56,17 +56,29 @@ class F3_rs1rs2 : F3_rs1 {
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set Inst{4-0} = rs2;
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set Inst{4-0} = rs2;
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}
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}
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// F3_rs1rs2 - Common class of instructions that only have rs1 and rs2 fields
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class F3_rs1rs2rd : F3_rs1rs2 {
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bits<5> rd;
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set Inst{29-25} = rd;
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set Inst{4-0} = rs2;
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}
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// F3_rs1simm13 - Common class of instructions that only have rs1 and simm13
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// F3_rs1simm13 - Common class of instructions that only have rs1 and simm13
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class F3_rs1simm13 : F3_rs1 {
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class F3_rs1simm13 : F3_rs1 {
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bits<13> simm13;
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bits<13> simm13;
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set Inst{12-0} = simm13;
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set Inst{12-0} = simm13;
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}
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}
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class F3_rs1simm13rd : F3_rs1simm13 {
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bits<5> rd;
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set Inst{29-25} = rd;
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}
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// Specific F3 classes...
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// Specific F3 classes...
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//
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//
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class F3_1<bits<2> opVal, bits<6> op3val, string name> : F3_rdrs1rs2 {
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class F3_1<bits<2> opVal, bits<6> op3val, string name> : F3_rs1rs2rd {
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set op = opVal;
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set op = opVal;
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set op3 = op3val;
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set op3 = op3val;
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set Name = name;
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set Name = name;
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@ -74,13 +86,33 @@ class F3_1<bits<2> opVal, bits<6> op3val, string name> : F3_rdrs1rs2 {
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//set Inst{12-5} = dontcare;
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//set Inst{12-5} = dontcare;
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}
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}
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class F3_2<bits<2> opVal, bits<6> op3val, string name> : F3_rdsimm13rs1 {
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class F3_2<bits<2> opVal, bits<6> op3val, string name> : F3_rs1simm13rd {
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set op = opVal;
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set op = opVal;
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set op3 = op3val;
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set op3 = op3val;
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set Name = name;
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set Name = name;
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set Inst{13} = 1; // i field = 1
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set Inst{13} = 1; // i field = 1
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}
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}
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#if 0
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// The ordering is actually incorrect in these: in the assemble syntax,
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// rd appears last!
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class F3_1a<bits<2> opVal, bits<6> op3val, string name> : F3_rdrs1rs2 {
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set op = opVal;
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set op3 = op3val;
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set Name = name;
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set Inst{13} = 0; // i field = 0
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//set Inst{12-5} = dontcare;
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}
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class F3_2a<bits<2> opVal, bits<6> op3val, string name> : F3_rdsimm13rs1 {
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set op = opVal;
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set op3 = op3val;
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set Name = name;
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set Inst{13} = 1; // i field = 1
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}
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#endif
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class F3_3<bits<2> opVal, bits<6> op3val, string name> : F3_rs1rs2 {
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class F3_3<bits<2> opVal, bits<6> op3val, string name> : F3_rs1rs2 {
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set op = opVal;
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set op = opVal;
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set op3 = op3val;
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set op3 = op3val;
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