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%fcc is not an alias for %fcc0

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25906 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-02 08:02:20 +00:00
parent 4032cf049d
commit c8c0bb00a3
2 changed files with 8 additions and 8 deletions
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8
lib/Target/Sparc/SparcInstrInfo.td
View File

@ -739,12 +739,12 @@ let Predicates = [HasV9], isTwoAddress = 1 in {
def MOVFCCrr def MOVFCCrr
: Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F, V8CC:$cc), : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F, V8CC:$cc),
"mov$cc %fcc, $F, $dst", "mov$cc %fcc0, $F, $dst",
[(set IntRegs:$dst, [(set IntRegs:$dst,
(V8selectfcc IntRegs:$F, IntRegs:$T, imm:$cc, FCC))]>; (V8selectfcc IntRegs:$F, IntRegs:$T, imm:$cc, FCC))]>;
def MOVFCCri def MOVFCCri
: Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F, V8CC:$cc), : Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F, V8CC:$cc),
"mov$cc %fcc, $F, $dst", "mov$cc %fcc0, $F, $dst",
[(set IntRegs:$dst, [(set IntRegs:$dst,
(V8selectfcc simm11:$F, IntRegs:$T, imm:$cc, FCC))]>; (V8selectfcc simm11:$F, IntRegs:$T, imm:$cc, FCC))]>;
@ -760,12 +760,12 @@ let Predicates = [HasV9], isTwoAddress = 1 in {
(V8selecticc DFPRegs:$F, DFPRegs:$T, imm:$cc, ICC))]>; (V8selecticc DFPRegs:$F, DFPRegs:$T, imm:$cc, ICC))]>;
def FMOVS_FCC def FMOVS_FCC
: Pseudo<(ops FPRegs:$dst, FPRegs:$T, FPRegs:$F, V8CC:$cc), : Pseudo<(ops FPRegs:$dst, FPRegs:$T, FPRegs:$F, V8CC:$cc),
"fmovs$cc %fcc, $F, $dst", "fmovs$cc %fcc0, $F, $dst",
[(set FPRegs:$dst, [(set FPRegs:$dst,
(V8selectfcc FPRegs:$F, FPRegs:$T, imm:$cc, FCC))]>; (V8selectfcc FPRegs:$F, FPRegs:$T, imm:$cc, FCC))]>;
def FMOVD_FCC def FMOVD_FCC
: Pseudo<(ops DFPRegs:$dst, DFPRegs:$T, DFPRegs:$F, V8CC:$cc), : Pseudo<(ops DFPRegs:$dst, DFPRegs:$T, DFPRegs:$F, V8CC:$cc),
"fmovd$cc %fcc, $F, $dst", "fmovd$cc %fcc0, $F, $dst",
[(set DFPRegs:$dst, [(set DFPRegs:$dst,
(V8selectfcc DFPRegs:$F, DFPRegs:$T, imm:$cc, FCC))]>; (V8selectfcc DFPRegs:$F, DFPRegs:$T, imm:$cc, FCC))]>;

8
lib/Target/SparcV8/SparcV8InstrInfo.td
View File

@ -739,12 +739,12 @@ let Predicates = [HasV9], isTwoAddress = 1 in {
def MOVFCCrr def MOVFCCrr
: Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F, V8CC:$cc), : Pseudo<(ops IntRegs:$dst, IntRegs:$T, IntRegs:$F, V8CC:$cc),
"mov$cc %fcc, $F, $dst", "mov$cc %fcc0, $F, $dst",
[(set IntRegs:$dst, [(set IntRegs:$dst,
(V8selectfcc IntRegs:$F, IntRegs:$T, imm:$cc, FCC))]>; (V8selectfcc IntRegs:$F, IntRegs:$T, imm:$cc, FCC))]>;
def MOVFCCri def MOVFCCri
: Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F, V8CC:$cc), : Pseudo<(ops IntRegs:$dst, IntRegs:$T, i32imm:$F, V8CC:$cc),
"mov$cc %fcc, $F, $dst", "mov$cc %fcc0, $F, $dst",
[(set IntRegs:$dst, [(set IntRegs:$dst,
(V8selectfcc simm11:$F, IntRegs:$T, imm:$cc, FCC))]>; (V8selectfcc simm11:$F, IntRegs:$T, imm:$cc, FCC))]>;
@ -760,12 +760,12 @@ let Predicates = [HasV9], isTwoAddress = 1 in {
(V8selecticc DFPRegs:$F, DFPRegs:$T, imm:$cc, ICC))]>; (V8selecticc DFPRegs:$F, DFPRegs:$T, imm:$cc, ICC))]>;
def FMOVS_FCC def FMOVS_FCC
: Pseudo<(ops FPRegs:$dst, FPRegs:$T, FPRegs:$F, V8CC:$cc), : Pseudo<(ops FPRegs:$dst, FPRegs:$T, FPRegs:$F, V8CC:$cc),
"fmovs$cc %fcc, $F, $dst", "fmovs$cc %fcc0, $F, $dst",
[(set FPRegs:$dst, [(set FPRegs:$dst,
(V8selectfcc FPRegs:$F, FPRegs:$T, imm:$cc, FCC))]>; (V8selectfcc FPRegs:$F, FPRegs:$T, imm:$cc, FCC))]>;
def FMOVD_FCC def FMOVD_FCC
: Pseudo<(ops DFPRegs:$dst, DFPRegs:$T, DFPRegs:$F, V8CC:$cc), : Pseudo<(ops DFPRegs:$dst, DFPRegs:$T, DFPRegs:$F, V8CC:$cc),
"fmovd$cc %fcc, $F, $dst", "fmovd$cc %fcc0, $F, $dst",
[(set DFPRegs:$dst, [(set DFPRegs:$dst,
(V8selectfcc DFPRegs:$F, DFPRegs:$T, imm:$cc, FCC))]>; (V8selectfcc DFPRegs:$F, DFPRegs:$T, imm:$cc, FCC))]>;