From c8e2c5561c65d048198c211baae9e5b961799767 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Sat, 25 Mar 2006 23:00:56 +0000 Subject: [PATCH] Add some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27133 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/RegAllocLinearScan.cpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 252fcfc2e83..59467c1e0f8 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -539,6 +539,7 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) DEBUG(std::cerr << "\tassigning stack slot at interval "<< *cur << ":\n"); + // Find a register to spill. float minWeight = float(HUGE_VAL); unsigned minReg = 0; for (TargetRegisterClass::iterator i = RC->allocation_order_begin(*mf_), @@ -549,6 +550,9 @@ void RA::assignRegOrStackSlotAtInterval(LiveInterval* cur) minReg = reg; } } + + // If we didn't find a register that is spillable, try aliases? + // FIXME: assert(minReg && "Didn't find any reg!"); DEBUG(std::cerr << "\t\tregister with min weight: " << mri_->getName(minReg) << " (" << minWeight << ")\n");