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Unbreak build.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117155 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2010-10-22 21:49:09 +00:00
parent 364f17c471
commit c8f46c45a0
2 changed files with 11 additions and 10 deletions
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11
lib/CodeGen/MachineInstr.cpp
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@ -1253,6 +1253,17 @@ bool MachineInstr::allDefsAreDead() const {
return true; return true;
} }
/// copyImplicitOps - Copy implicit register operands from specified
/// instruction to this instruction.
void MachineInstr::copyImplicitOps(const MachineInstr *MI) {
for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands();
i != e; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isImplicit())
addOperand(MO);
}
}
void MachineInstr::dump() const { void MachineInstr::dump() const {
dbgs() << " " << *this; dbgs() << " " << *this;
} }

10
lib/CodeGen/SimpleRegisterCoalescing.cpp
View File

@ -285,16 +285,6 @@ bool SimpleRegisterCoalescing::HasOtherReachingDefs(LiveInterval &IntA,
return false; return false;
} }
static void
TransferImplicitOps(MachineInstr *MI, MachineInstr *NewMI) {
for (unsigned i = MI->getDesc().getNumOperands(), e = MI->getNumOperands();
i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isImplicit())
NewMI->addOperand(MO);
}
}
/// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with /// RemoveCopyByCommutingDef - We found a non-trivially-coalescable copy with
/// IntA being the source and IntB being the dest, thus this defines a value /// IntA being the source and IntB being the dest, thus this defines a value
/// number in IntB. If the source value number (in IntA) is defined by a /// number in IntB. If the source value number (in IntA) is defined by a