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[NVPTX] Add 'b' asm constraint

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211946 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Justin Holewinski 2014-06-27 18:36:06 +00:00
parent 9272c2b67e
commit c95d327874
2 changed files with 10 additions and 0 deletions
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3
lib/Target/NVPTX/NVPTXISelLowering.cpp
View File

@ -2605,6 +2605,7 @@ NVPTXTargetLowering::getConstraintType(const std::string &Constraint) const {
switch (Constraint[0]) {
default:
break;
case 'b':
case 'r':
case 'h':
case 'c':
@ -2624,6 +2625,8 @@ NVPTXTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
MVT VT) const {
if (Constraint.size() == 1) {
switch (Constraint[0]) {
case 'b':
return std::make_pair(0U, &NVPTX::Int1RegsRegClass);
case 'c':
return std::make_pair(0U, &NVPTX::Int16RegsRegClass);
case 'h':

7
test/CodeGen/NVPTX/inline-asm.ll
View File

@ -7,3 +7,10 @@ entry:
%0 = call float asm "ex2.approx.ftz.f32 $0, $1;", "=f,f"(float %x)
ret float %0
}
define i32 @foo(i1 signext %cond, i32 %a, i32 %b) #0 {
entry:
; CHECK: selp.b32 %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %p{{[0-9]+}}
%0 = tail call i32 asm "selp.b32 $0, $1, $2, $3;", "=r,r,r,b"(i32 %a, i32 %b, i1 %cond)
ret i32 %0
}