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Remove a bunch of ad-hoc target-specific flags that were only used by the
old asmprinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15660 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -36,19 +36,15 @@ def X86InstrInfo : InstrInfo {
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let TSFlagsFields = ["FormBits",
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"hasOpSizePrefix",
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"Prefix",
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"MemTypeBits",
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"ImmTypeBits",
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"FPFormBits",
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"printImplicitUsesAfter",
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"Opcode"];
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let TSFlagsShifts = [0,
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5,
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6,
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10,
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13,
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15,
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18,
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19];
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12,
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16];
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}
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def X86 : Target {
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@ -108,22 +108,10 @@ namespace X86II {
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DC = 7 << Op0Shift, DD = 8 << Op0Shift,
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DE = 9 << Op0Shift, DF = 10 << Op0Shift,
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//===------------------------------------------------------------------===//
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// This three-bit field describes the size of a memory operand. Zero is
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// unused so that we can tell if we forgot to set a value.
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MemShift = 10,
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MemMask = 7 << MemShift,
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Mem8 = 1 << MemShift,
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Mem16 = 2 << MemShift,
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Mem32 = 3 << MemShift,
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Mem64 = 4 << MemShift,
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Mem80 = 5 << MemShift,
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Mem128 = 6 << MemShift,
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//===------------------------------------------------------------------===//
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// This two-bit field describes the size of an immediate operand. Zero is
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// unused so that we can tell if we forgot to set a value.
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ImmShift = 13,
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ImmShift = 10,
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ImmMask = 7 << ImmShift,
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Imm8 = 1 << ImmShift,
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Imm16 = 2 << ImmShift,
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@ -133,7 +121,7 @@ namespace X86II {
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// FP Instruction Classification... Zero is non-fp instruction.
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// FPTypeMask - Mask for all of the FP types...
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FPTypeShift = 15,
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FPTypeShift = 12,
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FPTypeMask = 7 << FPTypeShift,
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// NotFP - The default, set for instructions that do not use FP registers.
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@ -165,13 +153,10 @@ namespace X86II {
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// SpecialFP - Special instruction forms. Dispatch by opcode explicitly.
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SpecialFP = 7 << FPTypeShift,
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// PrintImplUsesAfter - Print out implicit uses in the assembly output after
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// the normal operands.
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PrintImplUsesAfter = 1 << 18,
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OpcodeShift = 19,
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// Bit 15 is unused.
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OpcodeShift = 16,
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OpcodeMask = 0xFF << OpcodeShift,
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// Bits 27 -> 31 are unused
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// Bits 24 -> 31 are unused
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};
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}
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@ -62,18 +62,6 @@ def Imm8 : ImmType<1>;
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def Imm16 : ImmType<2>;
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def Imm32 : ImmType<3>;
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// MemType - This specifies the immediate type used by an instruction. This is
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// part of the ad-hoc solution used to emit machine instruction encodings by our
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// machine code emitter.
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class MemType<bits<3> val> {
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bits<3> Value = val;
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}
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def NoMem : MemType<0>;
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def Mem16 : MemType<2>;
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def Mem32 : MemType<3>;
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def Mem64 : MemType<4>;
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def Mem80 : MemType<5>;
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// FPFormat - This specifies what form this FP instruction has. This is used by
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// the Floating-Point stackifier pass.
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class FPFormat<bits<3> val> {
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@ -89,26 +77,23 @@ def CondMovFP : FPFormat<6>;
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def SpecialFP : FPFormat<7>;
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class X86Inst<string nam, bits<8> opcod, Format f, MemType m, ImmType i> : Instruction {
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class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr> : Instruction {
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let Namespace = "X86";
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let Name = nam;
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bits<8> Opcode = opcod;
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Format Form = f;
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bits<5> FormBits = Form.Value;
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MemType MemT = m;
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bits<3> MemTypeBits = MemT.Value;
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ImmType ImmT = i;
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bits<2> ImmTypeBits = ImmT.Value;
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dag OperandList = ops;
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string AsmString = AsmStr;
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//
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// Attributes specific to X86 instructions...
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//
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bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix?
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// Flag whether implicit register usage is printed after the instruction.
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bit printImplicitUsesAfter = 0;
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bits<4> Prefix = 0; // Which prefix byte does this inst have?
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FPFormat FPForm; // What flavor of FP instruction is this?
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bits<3> FPFormBits = 0;
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@ -119,12 +104,6 @@ class Imp<list<Register> uses, list<Register> defs> {
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list<Register> Defs = defs;
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}
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// II - InstructionInfo - this will eventually replace the I class.
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class II<dag ops, string AsmStr> {
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dag OperandList = ops;
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string AsmString = AsmStr;
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}
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// Prefix byte classes which are used to indicate to the ad-hoc machine code
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// emitter that various prefix bytes are required.
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@ -144,12 +123,11 @@ class DF { bits<4> Prefix = 10; }
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//===----------------------------------------------------------------------===//
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// Instruction templates...
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class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<"", o, f, NoMem, NoImm>, II<ops, asm>;
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class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, NoImm, ops, asm>;
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class Ii<bits<8> o, Format f, ImmType i> : X86Inst<"", o, f, NoMem, i>;
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class Ii8 <bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm8 >, II<ops, asm>;
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class Ii16<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm16>, II<ops, asm>;
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class Ii32<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm32>, II<ops, asm>;
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class Ii8 <bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm8 , ops, asm>;
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class Ii16<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm16, ops, asm>;
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class Ii32<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm32, ops, asm>;
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//===----------------------------------------------------------------------===//
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// Instruction list...
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@ -893,7 +871,7 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (ops R32:$dst, i16mem:$src), "movzx $dst, $s
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// Floating point instruction template
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class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
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: X86Inst<"", o, F, NoMem, NoImm>, II<ops, asm> {
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: X86Inst<o, F, NoImm, ops, asm> {
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let FPForm = fp; let FPFormBits = FPForm.Value;
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}
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