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ARM: Let the assembler reject v5 instructions in v4 mode.
PR18524. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199559 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -186,7 +186,8 @@ def ARMvminnm : SDNode<"ARMISD::VMINNM", SDT_ARMVMINNM, []>;
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def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
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AssemblerPredicate<"HasV4TOps", "armv4t">;
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def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
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def HasV5T : Predicate<"Subtarget->hasV5TOps()">;
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def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
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AssemblerPredicate<"HasV5TOps", "armv5t">;
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def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
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AssemblerPredicate<"HasV5TEOps", "armv5te">;
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def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
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8
test/MC/ARM/not-armv4.s
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8
test/MC/ARM/not-armv4.s
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@ -0,0 +1,8 @@
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@ RUN: not llvm-mc < %s -triple armv4-unknown-unknown -show-encoding 2>&1 | FileCheck %s
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@ PR18524
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@ CHECK: error: instruction requires: armv5t
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clz r4,r9
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@ CHECK: error: instruction requires: armv6t2
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rbit r4,r9
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