mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 20:32:21 +00:00
ARM: Let the assembler reject v5 instructions in v4 mode.
PR18524. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199559 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
ee760949ab
commit
c975958498
@ -186,7 +186,8 @@ def ARMvminnm : SDNode<"ARMISD::VMINNM", SDT_ARMVMINNM, []>;
|
||||
def HasV4T : Predicate<"Subtarget->hasV4TOps()">,
|
||||
AssemblerPredicate<"HasV4TOps", "armv4t">;
|
||||
def NoV4T : Predicate<"!Subtarget->hasV4TOps()">;
|
||||
def HasV5T : Predicate<"Subtarget->hasV5TOps()">;
|
||||
def HasV5T : Predicate<"Subtarget->hasV5TOps()">,
|
||||
AssemblerPredicate<"HasV5TOps", "armv5t">;
|
||||
def HasV5TE : Predicate<"Subtarget->hasV5TEOps()">,
|
||||
AssemblerPredicate<"HasV5TEOps", "armv5te">;
|
||||
def HasV6 : Predicate<"Subtarget->hasV6Ops()">,
|
||||
|
8
test/MC/ARM/not-armv4.s
Normal file
8
test/MC/ARM/not-armv4.s
Normal file
@ -0,0 +1,8 @@
|
||||
@ RUN: not llvm-mc < %s -triple armv4-unknown-unknown -show-encoding 2>&1 | FileCheck %s
|
||||
|
||||
@ PR18524
|
||||
@ CHECK: error: instruction requires: armv5t
|
||||
clz r4,r9
|
||||
|
||||
@ CHECK: error: instruction requires: armv6t2
|
||||
rbit r4,r9
|
Loading…
Reference in New Issue
Block a user