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Cleaning up of prologue/epilogue code for Mips16. First step

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here is to make save/restore into variable number of argument instructions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196726 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reed Kotler
2013-12-08 16:51:52 +00:00
parent 7c4342e90b
commit c9ea75ee5b
8 changed files with 59 additions and 39 deletions
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17
lib/Target/Mips/Mips16InstrInfo.cpp
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@@ -182,12 +182,17 @@ void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
if (!NeverUseSaveRestore) {
if (isUInt<11>(FrameSize))
BuildMI(MBB, I, DL, get(Mips::SaveRaF16)).addImm(FrameSize);
//BuildMI(MBB, I, DL, get(Mips::SaveRaF16)).addImm(FrameSize);
BuildMI(MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addReg(Mips::S2).addImm(FrameSize);
else {
int Base = 2040; // should create template function like isUInt that
// returns largest possible n bit unsigned integer
int64_t Remainder = FrameSize - Base;
BuildMI(MBB, I, DL, get(Mips::SaveRaF16)). addImm(Base);
BuildMI(MBB, I, DL, get(Mips::SaveX16)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addReg(Mips::S2).addImm(Base);
if (isInt<16>(-Remainder))
BuildAddiuSpImm(MBB, I, -Remainder);
else
@@ -224,7 +229,9 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
if (!NeverUseSaveRestore) {
if (isUInt<11>(FrameSize))
BuildMI(MBB, I, DL, get(Mips::RestoreRaF16)).addImm(FrameSize);
BuildMI(MBB, I, DL, get(Mips::RestoreX16)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addReg(Mips::S2).addImm(FrameSize);
else {
int Base = 2040; // should create template function like isUInt that
// returns largest possible n bit unsigned integer
@@ -233,7 +240,9 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
BuildAddiuSpImm(MBB, I, Remainder);
else
adjustStackPtrBig(SP, Remainder, MBB, I, Mips::A0, Mips::A1);
BuildMI(MBB, I, DL, get(Mips::RestoreRaF16)). addImm(Base);
BuildMI(MBB, I, DL, get(Mips::RestoreX16)).addReg(Mips::RA).
addReg(Mips::S0).
addReg(Mips::S1).addReg(Mips::S2).addImm(Base);
}
}
else {