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https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-26 12:20:42 +00:00
Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48995 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -642,9 +642,10 @@ static void UpdateKills(MachineInstr &MI, BitVector &RegKills,
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static void ReMaterialize(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator &MII,
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unsigned DestReg, unsigned Reg,
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const TargetInstrInfo *TII,
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const TargetRegisterInfo *TRI,
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VirtRegMap &VRM) {
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TRI->reMaterialize(MBB, MII, DestReg, VRM.getReMaterializedMI(Reg));
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TII->reMaterialize(MBB, MII, DestReg, VRM.getReMaterializedMI(Reg));
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MachineInstr *NewMI = prior(MII);
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for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = NewMI->getOperand(i);
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@@ -784,7 +785,7 @@ namespace {
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MachineBasicBlock::iterator MII = MI;
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if (NewOp.StackSlotOrReMat > VirtRegMap::MAX_STACK_SLOT) {
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ReMaterialize(*MBB, MII, NewPhysReg, NewOp.VirtReg, TRI, VRM);
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ReMaterialize(*MBB, MII, NewPhysReg, NewOp.VirtReg, TII, TRI,VRM);
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} else {
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TII->loadRegFromStackSlot(*MBB, MII, NewPhysReg,
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NewOp.StackSlotOrReMat, AliasRC);
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@@ -1098,7 +1099,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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unsigned Phys = VRM.getPhys(VirtReg);
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RegInfo->setPhysRegUsed(Phys);
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if (VRM.isReMaterialized(VirtReg)) {
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ReMaterialize(MBB, MII, Phys, VirtReg, TRI, VRM);
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ReMaterialize(MBB, MII, Phys, VirtReg, TII, TRI, VRM);
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} else {
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const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
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int SS = VRM.getStackSlot(VirtReg);
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@@ -1351,7 +1352,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) {
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RegInfo->setPhysRegUsed(PhysReg);
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ReusedOperands.markClobbered(PhysReg);
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if (DoReMat) {
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ReMaterialize(MBB, MII, PhysReg, VirtReg, TRI, VRM);
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ReMaterialize(MBB, MII, PhysReg, VirtReg, TII, TRI, VRM);
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} else {
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const TargetRegisterClass* RC = RegInfo->getRegClass(VirtReg);
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TII->loadRegFromStackSlot(MBB, &MI, PhysReg, SSorRMId, RC);
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