diff --git a/lib/Target/PowerPC/PowerPCRegisterInfo.cpp b/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
index ee892c2dffd..da67be3d845 100644
--- a/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
+++ b/lib/Target/PowerPC/PowerPCRegisterInfo.cpp
@@ -32,64 +32,65 @@ PowerPCRegisterInfo::PowerPCRegisterInfo()
                            PPC32::ADJCALLSTACKUP) {}
 
 static unsigned getIdx(const TargetRegisterClass *RC) {
-	if (RC == PowerPC::GPRCRegisterClass) {
-		switch (RC->getSize()) {
-			default: assert(0 && "Invalid data size!");
-			case 1:  return 0;
-			case 2:  return 1;
-			case 4:  return 2;
-		}
-	}
-	else if (RC == PowerPC::FPRCRegisterClass) {
-		switch (RC->getSize()) {
-			default: assert(0 && "Invalid data size!");
-			case 4:  return 3;
-			case 8:  return 4;
-		}
-	}
-	abort();
+  if (RC == PowerPC::GPRCRegisterClass) {
+    switch (RC->getSize()) {
+      default: assert(0 && "Invalid data size!");
+      case 1:  return 0;
+      case 2:  return 1;
+      case 4:  return 2;
+    }
+  } else if (RC == PowerPC::FPRCRegisterClass) {
+    switch (RC->getSize()) {
+      default: assert(0 && "Invalid data size!");
+      case 4:  return 3;
+      case 8:  return 4;
+    }
+  }
+  std::cerr << "Invalid register class to getIdx()!\n";
+  abort();
 }
 
-int PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
+int 
+PowerPCRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
                                          MachineBasicBlock::iterator MI,
                                          unsigned SrcReg, int FrameIdx,
                                          const TargetRegisterClass *RC) const {
-	static const unsigned Opcode[] = 
-	{ PPC32::STB, PPC32::STH, PPC32::STW, PPC32::STFS, PPC32::STFD };
-
-	unsigned OC = Opcode[getIdx(RC)];
-	MBB.insert(MI, addFrameReference(BuildMI(OC, 3).addReg(SrcReg),FrameIdx));
-	return 1;
+  static const unsigned Opcode[] = { 
+    PPC32::STB, PPC32::STH, PPC32::STW, PPC32::STFS, PPC32::STFD 
+  };
+  unsigned OC = Opcode[getIdx(RC)];
+  MBB.insert(MI, addFrameReference(BuildMI(OC, 3).addReg(SrcReg),FrameIdx));
+  return 1;
 }
 
 int PowerPCRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
                                           MachineBasicBlock::iterator MI,
                                           unsigned DestReg, int FrameIdx,
                                           const TargetRegisterClass *RC) const{
-	static const unsigned Opcode[] =
-
-	{ PPC32::LBZ, PPC32::LHZ, PPC32::LWZ, PPC32::LFS, PPC32::LFD };
-	unsigned OC = Opcode[getIdx(RC)];
-	MBB.insert(MI, addFrameReference(BuildMI(OC, 2, DestReg), FrameIdx));
-	return 1;
+  static const unsigned Opcode[] = { 
+    PPC32::LBZ, PPC32::LHZ, PPC32::LWZ, PPC32::LFS, PPC32::LFD 
+  };
+  unsigned OC = Opcode[getIdx(RC)];
+  MBB.insert(MI, addFrameReference(BuildMI(OC, 2, DestReg), FrameIdx));
+  return 1;
 }
 
 int PowerPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
-                                  MachineBasicBlock::iterator MI,
-                                  unsigned DestReg, unsigned SrcReg,
-                                  const TargetRegisterClass *RC) const {
-	MachineInstr *I;
+                                      MachineBasicBlock::iterator MI,
+                                      unsigned DestReg, unsigned SrcReg,
+                                      const TargetRegisterClass *RC) const {
+  MachineInstr *I;
 
-	if(RC == PowerPC::GPRCRegisterClass) {
-		I = BuildMI(PPC32::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
-	} else if (RC == PowerPC::FPRCRegisterClass) {
-		I = BuildMI(PPC32::FMR, 1, DestReg).addReg(SrcReg);
-	} else { 
-		std::cerr << "Attempt to copy register that is not GPR or FPR";
-		abort();
-	}
-	MBB.insert(MI, I);
-	return 1;
+  if (RC == PowerPC::GPRCRegisterClass) {
+    I = BuildMI(PPC32::OR, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
+  } else if (RC == PowerPC::FPRCRegisterClass) {
+    I = BuildMI(PPC32::FMR, 1, DestReg).addReg(SrcReg);
+  } else { 
+    std::cerr << "Attempt to copy register that is not GPR or FPR";
+    abort();
+  }
+  MBB.insert(MI, I);
+  return 1;
 }
 
 //===----------------------------------------------------------------------===//
@@ -101,7 +102,7 @@ int PowerPCRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
 // if frame pointer elimination is disabled.
 //
 static bool hasFP(MachineFunction &MF) {
-	return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
+  return NoFramePointerElim || MF.getFrameInfo()->hasVarSizedObjects();
 }
 
 void PowerPCRegisterInfo::
@@ -121,10 +122,12 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
 			
 			MachineInstr *New;
 			if (Old->getOpcode() == PPC32::ADJCALLSTACKDOWN) {
-				New=BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(-Amount);
+				New = BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1)
+          .addSImm(-Amount);
 			} else {
 				assert(Old->getOpcode() == PPC32::ADJCALLSTACKUP);
-				New=BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(Amount);
+				New = BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1)
+          .addSImm(Amount);
 			}
 			
 			// Replace the pseudo instruction with a new instruction...
@@ -166,99 +169,97 @@ PowerPCRegisterInfo::eliminateFrameIndex(MachineFunction &MF,
 }
 
 
-void PowerPCRegisterInfo::processFunctionBeforeFrameFinalized(
-    MachineFunction &MF) const {
-	// Do Nothing
+void
+PowerPCRegisterInfo::processFunctionBeforeFrameFinalized(MachineFunction &MF)
+  const {
+  // Do Nothing
 }
 
 void PowerPCRegisterInfo::emitPrologue(MachineFunction &MF) const {
-	MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
-	MachineBasicBlock::iterator MBBI = MBB.begin();
-	MachineFrameInfo *MFI = MF.getFrameInfo();
-	MachineInstr *MI;
+  MachineBasicBlock &MBB = MF.front();   // Prolog goes in entry BB
+  MachineBasicBlock::iterator MBBI = MBB.begin();
+  MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineInstr *MI;
+  
+  // Get the number of bytes to allocate from the FrameInfo
+  unsigned NumBytes = MFI->getStackSize();
 	
-	// Get the number of bytes to allocate from the FrameInfo
-	unsigned NumBytes = MFI->getStackSize();
-	
-    if (MFI->hasCalls()) {
-		// When we have no frame pointer, we reserve argument space for call sites
-		// in the function immediately on entry to the current function.  This
-		// eliminates the need for add/sub brackets around call sites.
-		//
-		NumBytes += MFI->getMaxCallFrameSize();
-		
-		// Round the size to a multiple of the alignment (don't forget the 4 byte
-		// offset though).
-		unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
-		NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
+  if (MFI->hasCalls()) {
+    // When we have no frame pointer, we reserve argument space for call sites
+    // in the function immediately on entry to the current function.  This
+    // eliminates the need for add/sub brackets around call sites.
+    //
+    NumBytes += MFI->getMaxCallFrameSize();
+    
+    // Round the size to a multiple of the alignment (don't forget the 4 byte
+    // offset though).
+    unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
+    NumBytes = ((NumBytes+4)+Align-1)/Align*Align - 4;
 
-		// Store the incoming LR so it is preserved across calls
-		MI= BuildMI(PPC32::MovePCtoLR, 0, PPC32::LR).addReg(PPC32::LR);
-		MBB.insert(MBBI, MI);
-		MI= BuildMI(PPC32::MFSPR, 1, PPC32::R0).addImm(8);
-		MBB.insert(MBBI, MI);
-		MI= BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
-		MBB.insert(MBBI, MI);
-    }
-	
-    // Update frame info to pretend that this is part of the stack...
-    MFI->setStackSize(NumBytes);
-	
-	// adjust stack pointer: r1 -= numbytes
-	if (NumBytes) {
-		MI= BuildMI(PPC32::STWU, 2, PPC32::R1).addImm(-NumBytes).addReg(PPC32::R1);
-		MBB.insert(MBBI, MI);
-    }
+    // Store the incoming LR so it is preserved across calls
+    MI = BuildMI(PPC32::MovePCtoLR, 0, PPC32::LR).addReg(PPC32::LR);
+    MBB.insert(MBBI, MI);
+    MI = BuildMI(PPC32::MFSPR, 1, PPC32::R0).addImm(8);
+    MBB.insert(MBBI, MI);
+    MI = BuildMI(PPC32::STW, 3).addReg(PPC32::R0).addSImm(8).addReg(PPC32::R1);
+    MBB.insert(MBBI, MI);
+  }
+
+  // Update frame info to pretend that this is part of the stack...
+  MFI->setStackSize(NumBytes);
+  
+  // adjust stack pointer: r1 -= numbytes
+  if (NumBytes) {
+    MI = BuildMI(PPC32::STWU, 2, PPC32::R1).addImm(-NumBytes).addReg(PPC32::R1);
+    MBB.insert(MBBI, MI);
+  }
 }
 
 void PowerPCRegisterInfo::emitEpilogue(MachineFunction &MF,
                                        MachineBasicBlock &MBB) const {
-	const MachineFrameInfo *MFI = MF.getFrameInfo();
-	MachineBasicBlock::iterator MBBI = prior(MBB.end());
-	MachineInstr *MI;
-	assert(MBBI->getOpcode() == PPC32::BLR &&
-		   "Can only insert epilog into returning blocks");
-	
-	// Get the number of bytes allocated from the FrameInfo...
-    unsigned NumBytes = MFI->getStackSize();
+  const MachineFrameInfo *MFI = MF.getFrameInfo();
+  MachineBasicBlock::iterator MBBI = prior(MBB.end());
+  MachineInstr *MI;
+  assert(MBBI->getOpcode() == PPC32::BLR &&
+       "Can only insert epilog into returning blocks");
+  
+  // Get the number of bytes allocated from the FrameInfo...
+  unsigned NumBytes = MFI->getStackSize();
 
-    // adjust stack pointer back: r1 += numbytes
-    if (NumBytes) {
-		MI =BuildMI(PPC32::ADDI, 2, PPC32::R1)
-		.addReg(PPC32::R1)
-		.addSImm(NumBytes);
-		MBB.insert(MBBI, MI);
-    }
-	
-	// If we have calls, restore the LR value before we branch to it
-    if (MFI->hasCalls()) {
-		MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(8).addReg(PPC32::R1);
-		MBB.insert(MBBI, MI);
-		MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0);
-		MBB.insert(MBBI, MI);
-	}
+  // adjust stack pointer back: r1 += numbytes
+  if (NumBytes) {
+    MI =BuildMI(PPC32::ADDI, 2, PPC32::R1).addReg(PPC32::R1).addSImm(NumBytes);
+    MBB.insert(MBBI, MI);
+  }
+  
+  // If we have calls, restore the LR value before we branch to it
+  if (MFI->hasCalls()) {
+    MI = BuildMI(PPC32::LWZ, 2, PPC32::R0).addSImm(8).addReg(PPC32::R1);
+    MBB.insert(MBBI, MI);
+    MI = BuildMI(PPC32::MTLR, 1).addReg(PPC32::R0);
+    MBB.insert(MBBI, MI);
+  }
 }
 
-
 #include "PowerPCGenRegisterInfo.inc"
 
 const TargetRegisterClass*
 PowerPCRegisterInfo::getRegClassForType(const Type* Ty) const {
-	switch (Ty->getTypeID()) {
-		case Type::LongTyID:
-		case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
-		default:              assert(0 && "Invalid type to getClass!");
-		case Type::BoolTyID:
-		case Type::SByteTyID:
-		case Type::UByteTyID:
-		case Type::ShortTyID:
-		case Type::UShortTyID:
-		case Type::IntTyID:
-		case Type::UIntTyID:
-		case Type::PointerTyID: return &GPRCInstance;
-			
-		case Type::FloatTyID:
-		case Type::DoubleTyID: return &FPRCInstance;
-	}
+  switch (Ty->getTypeID()) {
+    case Type::LongTyID:
+    case Type::ULongTyID: assert(0 && "Long values can't fit in registers!");
+    default:              assert(0 && "Invalid type to getClass!");
+    case Type::BoolTyID:
+    case Type::SByteTyID:
+    case Type::UByteTyID:
+    case Type::ShortTyID:
+    case Type::UShortTyID:
+    case Type::IntTyID:
+    case Type::UIntTyID:
+    case Type::PointerTyID: return &GPRCInstance;
+      
+    case Type::FloatTyID:
+    case Type::DoubleTyID: return &FPRCInstance;
+  }
 }