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Do not use register as base ptr of pre- and post- inc/dec load / store nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@71098 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -0,0 +1,11 @@
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; RUN: llvm-as < %s | llc -mtriple=arm-linuxeabi-unknown-gnu -mattr=+v6
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; PR4166
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%"byte[]" = type { i32, i8* }
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%tango.time.Time.Time = type { i64 }
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define fastcc void @t() {
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entry:
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%tmp28 = call fastcc i1 null(i32* null, %"byte[]" undef, %"byte[]" undef, %tango.time.Time.Time* byval null) ; <i1> [#uses=0]
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ret void
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}
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