From cab98e3168558a40675a06bc830eb87b8e40070e Mon Sep 17 00:00:00 2001 From: Mon P Wang Date: Fri, 19 Nov 2010 19:08:12 +0000 Subject: [PATCH] Make isScalarToVector to return false if the node is a scalar. This will prevent DAGCombine from making an illegal transformation of bitcast of a scalar to a vector into a scalar_to_vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119819 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 ++ test/CodeGen/X86/bc-extract.ll | 27 +++++++++++++++++++++++ 2 files changed, 29 insertions(+) create mode 100644 test/CodeGen/X86/bc-extract.ll diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 08ef505babc..82a1746bb3b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -199,6 +199,8 @@ bool ISD::isScalarToVector(const SDNode *N) { if (N->getOperand(0).getOpcode() == ISD::UNDEF) return false; unsigned NumElems = N->getNumOperands(); + if (NumElems == 1) + return false; for (unsigned i = 1; i < NumElems; ++i) { SDValue V = N->getOperand(i); if (V.getOpcode() != ISD::UNDEF) diff --git a/test/CodeGen/X86/bc-extract.ll b/test/CodeGen/X86/bc-extract.ll new file mode 100644 index 00000000000..6e8063ad7c0 --- /dev/null +++ b/test/CodeGen/X86/bc-extract.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse42 -disable-mmx | FileCheck %s + + +define float @extractFloat1() nounwind { +entry: + ; CHECK: 1065353216 + %tmp0 = bitcast <1 x double> to <2 x float> + %tmp1 = extractelement <2 x float> %tmp0, i32 0 + ret float %tmp1 +} + +define float @extractFloat2() nounwind { +entry: + ; CHECK: pxor %xmm0, %xmm0 + %tmp4 = bitcast <1 x double> to <2 x float> + %tmp5 = extractelement <2 x float> %tmp4, i32 1 + ret float %tmp5 +} + +define i32 @extractInt2() nounwind { +entry: + ; CHECK: xorl %eax, %eax + %tmp4 = bitcast <1 x i64> to <2 x i32> + %tmp5 = extractelement <2 x i32> %tmp4, i32 1 + ret i32 %tmp5 +} +