mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 19:29:31 +00:00
ADDmi{16,32} should be in the next case statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11547 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
a7be982e72
commit
cacca82833
@ -121,7 +121,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
#endif
|
||||
|
||||
case X86::ADDri16: case X86::ADDri32:
|
||||
case X86::ADDmi16: case X86::ADDmi32:
|
||||
case X86::SUBri16: case X86::SUBri32:
|
||||
case X86::ANDri16: case X86::ANDri32:
|
||||
case X86::ORri16: case X86::ORri32:
|
||||
@ -136,8 +135,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
default: assert(0 && "Unknown opcode value!");
|
||||
case X86::ADDri16: Opcode = X86::ADDri16b; break;
|
||||
case X86::ADDri32: Opcode = X86::ADDri32b; break;
|
||||
case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
|
||||
case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
|
||||
case X86::SUBri16: Opcode = X86::SUBri16b; break;
|
||||
case X86::SUBri32: Opcode = X86::SUBri32b; break;
|
||||
case X86::ANDri16: Opcode = X86::ANDri16b; break;
|
||||
@ -156,6 +153,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
return false;
|
||||
|
||||
|
||||
case X86::ADDmi16: case X86::ADDmi32:
|
||||
case X86::ANDmi16: case X86::ANDmi32:
|
||||
assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
|
||||
if (MI->getOperand(4).isImmediate()) {
|
||||
@ -165,6 +163,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
unsigned Opcode;
|
||||
switch (MI->getOpcode()) {
|
||||
default: assert(0 && "Unknown opcode value!");
|
||||
case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
|
||||
case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
|
||||
case X86::ANDmi16: Opcode = X86::ANDmi16b; break;
|
||||
case X86::ANDmi32: Opcode = X86::ANDmi32b; break;
|
||||
}
|
||||
|
@ -121,7 +121,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
#endif
|
||||
|
||||
case X86::ADDri16: case X86::ADDri32:
|
||||
case X86::ADDmi16: case X86::ADDmi32:
|
||||
case X86::SUBri16: case X86::SUBri32:
|
||||
case X86::ANDri16: case X86::ANDri32:
|
||||
case X86::ORri16: case X86::ORri32:
|
||||
@ -136,8 +135,6 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
default: assert(0 && "Unknown opcode value!");
|
||||
case X86::ADDri16: Opcode = X86::ADDri16b; break;
|
||||
case X86::ADDri32: Opcode = X86::ADDri32b; break;
|
||||
case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
|
||||
case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
|
||||
case X86::SUBri16: Opcode = X86::SUBri16b; break;
|
||||
case X86::SUBri32: Opcode = X86::SUBri32b; break;
|
||||
case X86::ANDri16: Opcode = X86::ANDri16b; break;
|
||||
@ -156,6 +153,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
return false;
|
||||
|
||||
|
||||
case X86::ADDmi16: case X86::ADDmi32:
|
||||
case X86::ANDmi16: case X86::ANDmi32:
|
||||
assert(MI->getNumOperands() == 5 && "These should all have 5 operands!");
|
||||
if (MI->getOperand(4).isImmediate()) {
|
||||
@ -165,6 +163,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB,
|
||||
unsigned Opcode;
|
||||
switch (MI->getOpcode()) {
|
||||
default: assert(0 && "Unknown opcode value!");
|
||||
case X86::ADDmi16: Opcode = X86::ADDmi16b; break;
|
||||
case X86::ADDmi32: Opcode = X86::ADDmi32b; break;
|
||||
case X86::ANDmi16: Opcode = X86::ANDmi16b; break;
|
||||
case X86::ANDmi32: Opcode = X86::ANDmi32b; break;
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user