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Some out operands were incorrectly specified as input operands.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40697 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng 2007-08-01 23:07:38 +00:00
parent 1451afe0e4
commit caf778ab3b
2 changed files with 17 additions and 17 deletions
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18
lib/Target/PowerPC/PPCInstr64Bit.td
View File

@ -272,13 +272,13 @@ def MULHDU : XOForm_1<31, 9, 0, (outs G8RC:$rT), (ins G8RC:$rA, G8RC:$rB),
"mulhdu $rT, $rA, $rB", IntMulHWU, "mulhdu $rT, $rA, $rB", IntMulHWU,
[(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>; [(set G8RC:$rT, (mulhu G8RC:$rA, G8RC:$rB))]>;
def CMPD : XForm_16_ext<31, 0, (outs), (ins CRRC:$crD, G8RC:$rA, G8RC:$rB), def CMPD : XForm_16_ext<31, 0, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB),
"cmpd $crD, $rA, $rB", IntCompare>, isPPC64; "cmpd $crD, $rA, $rB", IntCompare>, isPPC64;
def CMPLD : XForm_16_ext<31, 32, (outs), (ins CRRC:$crD, G8RC:$rA, G8RC:$rB), def CMPLD : XForm_16_ext<31, 32, (outs CRRC:$crD), (ins G8RC:$rA, G8RC:$rB),
"cmpld $crD, $rA, $rB", IntCompare>, isPPC64; "cmpld $crD, $rA, $rB", IntCompare>, isPPC64;
def CMPDI : DForm_5_ext<11, (outs), (ins CRRC:$crD, G8RC:$rA, s16imm:$imm), def CMPDI : DForm_5_ext<11, (outs CRRC:$crD), (ins G8RC:$rA, s16imm:$imm),
"cmpdi $crD, $rA, $imm", IntCompare>, isPPC64; "cmpdi $crD, $rA, $imm", IntCompare>, isPPC64;
def CMPLDI : DForm_6_ext<10, (outs), (ins CRRC:$dst, G8RC:$src1, u16imm:$src2), def CMPLDI : DForm_6_ext<10, (outs CRRC:$dst), (ins G8RC:$src1, u16imm:$src2),
"cmpldi $dst, $src1, $src2", IntCompare>, isPPC64; "cmpldi $dst, $src1, $src2", IntCompare>, isPPC64;
def SLD : XForm_6<31, 27, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB), def SLD : XForm_6<31, 27, (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB),
@ -374,7 +374,7 @@ def LWAX : XForm_1<31, 341, (outs G8RC:$rD), (ins memrr:$src),
PPC970_DGroup_Cracked; PPC970_DGroup_Cracked;
// Update forms. // Update forms.
def LHAU8 : DForm_1<43, (outs G8RC:$rD), (ins ptr_rc:$ea_result, symbolLo:$disp, def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp,
ptr_rc:$rA), ptr_rc:$rA),
"lhau $rD, $disp($rA)", LdStGeneral, "lhau $rD, $disp($rA)", LdStGeneral,
[]>, RegConstraint<"$rA = $ea_result">, []>, RegConstraint<"$rA = $ea_result">,
@ -407,15 +407,15 @@ def LWZX8 : XForm_1<31, 23, (outs G8RC:$rD), (ins memrr:$src),
// Update forms. // Update forms.
def LBZU8 : DForm_1<35, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LBZU8 : DForm_1<35, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lbzu $rD, $addr", LdStGeneral, "lbzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LHZU8 : DForm_1<41, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LHZU8 : DForm_1<41, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lhzu $rD, $addr", LdStGeneral, "lhzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LWZU8 : DForm_1<33, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LWZU8 : DForm_1<33, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lwzu $rD, $addr", LdStGeneral, "lwzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
@ -431,7 +431,7 @@ def LDX : XForm_1<31, 21, (outs G8RC:$rD), (ins memrr:$src),
"ldx $rD, $src", LdStLD, "ldx $rD, $src", LdStLD,
[(set G8RC:$rD, (load xaddr:$src))]>, isPPC64; [(set G8RC:$rD, (load xaddr:$src))]>, isPPC64;
def LDU : DSForm_1<58, 1, (outs G8RC:$rD), (ins ptr_rc:$ea_result, memrix:$addr), def LDU : DSForm_1<58, 1, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memrix:$addr),
"ldu $rD, $addr", LdStLD, "ldu $rD, $addr", LdStLD,
[]>, RegConstraint<"$addr.reg = $ea_result">, isPPC64, []>, RegConstraint<"$addr.reg = $ea_result">, isPPC64,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;

16
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -472,32 +472,32 @@ def LFD : DForm_1<50, (outs F8RC:$rD), (ins memri:$src),
// Unindexed (r+i) Loads with Update (preinc). // Unindexed (r+i) Loads with Update (preinc).
def LBZU : DForm_1<35, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LBZU : DForm_1<35, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lbzu $rD, $addr", LdStGeneral, "lbzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LHAU : DForm_1<43, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LHAU : DForm_1<43, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lhau $rD, $addr", LdStGeneral, "lhau $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LHZU : DForm_1<41, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LHZU : DForm_1<41, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lhzu $rD, $addr", LdStGeneral, "lhzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LWZU : DForm_1<33, (outs GPRC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LWZU : DForm_1<33, (outs GPRC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lwzu $rD, $addr", LdStGeneral, "lwzu $rD, $addr", LdStGeneral,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LFSU : DForm_1<49, (outs F4RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LFSU : DForm_1<49, (outs F4RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lfs $rD, $addr", LdStLFDU, "lfs $rD, $addr", LdStLFDU,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
def LFDU : DForm_1<51, (outs F8RC:$rD), (ins ptr_rc:$ea_result, memri:$addr), def LFDU : DForm_1<51, (outs F8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
"lfd $rD, $addr", LdStLFD, "lfd $rD, $addr", LdStLFD,
[]>, RegConstraint<"$addr.reg = $ea_result">, []>, RegConstraint<"$addr.reg = $ea_result">,
NoEncode<"$ea_result">; NoEncode<"$ea_result">;
@ -694,9 +694,9 @@ def XORIS : DForm_4<27, (outs GPRC:$dst), (ins GPRC:$src1, u16imm:$src2),
[(set GPRC:$dst, (xor GPRC:$src1,imm16ShiftedZExt:$src2))]>; [(set GPRC:$dst, (xor GPRC:$src1,imm16ShiftedZExt:$src2))]>;
def NOP : DForm_4_zero<24, (outs), (ins), "nop", IntGeneral, def NOP : DForm_4_zero<24, (outs), (ins), "nop", IntGeneral,
[]>; []>;
def CMPWI : DForm_5_ext<11, (outs), (ins CRRC:$crD, GPRC:$rA, s16imm:$imm), def CMPWI : DForm_5_ext<11, (outs CRRC:$crD), (ins GPRC:$rA, s16imm:$imm),
"cmpwi $crD, $rA, $imm", IntCompare>; "cmpwi $crD, $rA, $imm", IntCompare>;
def CMPLWI : DForm_6_ext<10, (outs), (ins CRRC:$dst, GPRC:$src1, u16imm:$src2), def CMPLWI : DForm_6_ext<10, (outs CRRC:$dst), (ins GPRC:$src1, u16imm:$src2),
"cmplwi $dst, $src1, $src2", IntCompare>; "cmplwi $dst, $src1, $src2", IntCompare>;
} }