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Fix va_arg for doubles. With this patch VAARG nodes always contain the
correct alignment information, which simplifies ExpandRes_VAARG a bit. The patch introduces a new alignment information to TargetLoweringInfo. This is needed since the two natural candidates cannot be used: * The 's' in target data: If this is set to the minimal alignment of any argument, getCallFrameTypeAlignment would return 4 for doubles on ARM for example. * The getTransientStackAlignment method. It is possible for an architecture to have argument less aligned than what we maintain the stack pointer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108072 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -582,7 +582,7 @@ public:
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/// getVAArg - VAArg produces a result and token chain, and takes a pointer
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/// and a source value as input.
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SDValue getVAArg(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
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SDValue SV, unsigned Align = 0);
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SDValue SV, unsigned Align);
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/// getAtomic - Gets a node for an atomic op, produces result and chain and
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/// takes 3 operands
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@ -686,6 +686,12 @@ public:
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return JumpBufAlignment;
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}
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/// getMinStackArgumentAlignment - return the minimum stack alignment of an
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/// argument.
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unsigned getMinStackArgumentAlignment() const {
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return MinStackArgumentAlignment;
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}
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/// getPrefLoopAlignment - return the preferred loop alignment.
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///
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unsigned getPrefLoopAlignment() const {
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@ -1082,6 +1088,12 @@ protected:
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PrefLoopAlignment = Align;
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}
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/// setMinStackArgumentAlignment - Set the minimum stack alignment of an
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/// argument.
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void setMinStackArgumentAlignment(unsigned Align) {
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MinStackArgumentAlignment = Align;
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}
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/// setShouldFoldAtomicFences - Set if the target's implementation of the
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/// atomic operation intrinsics includes locking. Default is false.
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void setShouldFoldAtomicFences(bool fold) {
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@ -1515,6 +1527,11 @@ private:
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/// buffers
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unsigned JumpBufAlignment;
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/// MinStackArgumentAlignment - The minimum alginment that any argument
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/// on the stack needs to have.
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///
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unsigned MinStackArgumentAlignment;
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/// PrefLoopAlignment - The perferred loop alignment.
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///
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unsigned PrefLoopAlignment;
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@ -2658,7 +2658,9 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
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false, false, 0);
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SDValue VAList = VAListLoad;
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if (Align != 0 ) {
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if (Align > TLI.getMinStackArgumentAlignment()) {
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assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
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VAList = DAG.getNode(ISD::ADD, dl, TLI.getPointerTy(), VAList,
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DAG.getConstant(Align - 1,
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TLI.getPointerTy()));
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@ -504,7 +504,8 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
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DebugLoc dl = N->getDebugLoc();
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SDValue NewVAARG;
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NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2));
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NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
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N->getConstantOperandVal(3));
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// Legalized the chain result - switch anything that used the old chain to
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// use the new one.
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@ -572,7 +572,8 @@ SDValue DAGTypeLegalizer::PromoteIntRes_VAARG(SDNode *N) {
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SmallVector<SDValue, 8> Parts(NumRegs);
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for (unsigned i = 0; i < NumRegs; ++i) {
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Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2));
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Parts[i] = DAG.getVAArg(RegVT, dl, Chain, Ptr, N->getOperand(2),
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N->getConstantOperandVal(3));
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Chain = Parts[i].getValue(1);
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}
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@ -243,13 +243,10 @@ void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) {
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SDValue Chain = N->getOperand(0);
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SDValue Ptr = N->getOperand(1);
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DebugLoc dl = N->getDebugLoc();
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const unsigned OldAlign = N->getConstantOperandVal(3);
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const Type *Type = OVT.getTypeForEVT(*DAG.getContext());
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const unsigned TypeAlign = TLI.getTargetData()->getABITypeAlignment(Type);
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const unsigned Align = std::max(OldAlign, TypeAlign);
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const unsigned Align = N->getConstantOperandVal(3);
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Lo = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2), Align);
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Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2));
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Hi = DAG.getVAArg(NVT, dl, Lo.getValue(1), Ptr, N->getOperand(2), 0);
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// Handle endianness of the load.
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if (TLI.isBigEndian())
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@ -5672,7 +5672,8 @@ void SelectionDAGBuilder::visitVAStart(const CallInst &I) {
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void SelectionDAGBuilder::visitVAArg(const VAArgInst &I) {
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SDValue V = DAG.getVAArg(TLI.getValueType(I.getType()), getCurDebugLoc(),
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getRoot(), getValue(I.getOperand(0)),
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DAG.getSrcValue(I.getOperand(0)));
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DAG.getSrcValue(I.getOperand(0)),
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TLI.getTargetData()->getABITypeAlignment(I.getType()));
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setValue(&I, V);
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DAG.setRoot(V.getValue(1));
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}
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@ -580,6 +580,7 @@ TargetLowering::TargetLowering(const TargetMachine &tm,
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JumpBufSize = 0;
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JumpBufAlignment = 0;
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PrefLoopAlignment = 0;
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MinStackArgumentAlignment = 1;
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ShouldFoldAtomicFences = false;
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InitLibcallNames(LibcallRoutineNames);
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@ -539,6 +539,10 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
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maxStoresPerMemcpy = 1; //// temporary - rewrite interface to use type
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// On ARM arguments smaller than 4 bytes are extended, so all arguments
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// are at least 4 bytes aligned.
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setMinStackArgumentAlignment(4);
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if (EnableARMCodePlacement)
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benefitFromCodePlacementOpt = true;
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}
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@ -1,10 +1,13 @@
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; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi | FileCheck %s
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; Test that we correctly align elements when using va_arg
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; CHECK: test1:
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; CHECK-NOT: bfc
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; CHECK: add r0, r0, #7
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; CHECK: bfc r0, #0, #3
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; CHECK-NOT: bfc
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define i64 @f8(i32 %i, ...) nounwind optsize {
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define i64 @test1(i32 %i, ...) nounwind optsize {
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entry:
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%g = alloca i8*, align 4
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%g1 = bitcast i8** %g to i8*
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@ -14,6 +17,25 @@ entry:
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ret i64 %0
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}
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; CHECK: test2:
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; CHECK-NOT: bfc
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; CHECK: add r0, r0, #7
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; CHECK: bfc r0, #0, #3
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; CHECK-NOT: bfc
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; CHECK: bx lr
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define double @test2(i32 %a, i32 %b, ...) nounwind optsize {
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entry:
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%ap = alloca i8*, align 4 ; <i8**> [#uses=3]
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%ap1 = bitcast i8** %ap to i8* ; <i8*> [#uses=2]
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call void @llvm.va_start(i8* %ap1)
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%0 = va_arg i8** %ap, i32 ; <i32> [#uses=0]
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%1 = va_arg i8** %ap, double ; <double> [#uses=1]
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call void @llvm.va_end(i8* %ap1)
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ret double %1
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}
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declare void @llvm.va_start(i8*) nounwind
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declare void @llvm.va_end(i8*) nounwind
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