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misched: DAG builder should not track dependencies for SSA defs.

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The vast majority of virtual register definitions don't need an entry
in the DAG builder's VRegDefs set.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151136 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2012-02-22 06:08:13 +00:00
parent b4566a9999
commit cc77b54036
1 changed files with 5 additions and 1 deletions
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6
lib/CodeGen/ScheduleDAGInstrs.cpp
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@ -44,7 +44,7 @@ ScheduleDAGInstrs::ScheduleDAGInstrs(MachineFunction &mf,
LoopRegs(MLI, MDT), FirstDbgValue(0) {
assert((IsPostRA || LIS) && "PreRA scheduling requires LiveIntervals");
DbgValues.clear();
assert(!(IsPostRA && MF.getRegInfo().getNumVirtRegs()) &&
assert(!(IsPostRA && MRI.getNumVirtRegs()) &&
"Virtual registers must be removed prior to PostRA scheduling");
}
@ -361,6 +361,10 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
const MachineInstr *MI = SU->getInstr();
unsigned Reg = MI->getOperand(OperIdx).getReg();
// SSA defs do not have output/anti dependencies.
if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
return;
// Add output dependence to the next nearest def of this vreg.
//
// Unless this definition is dead, the output dependence should be