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Clean up some unnecessary initializations.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83566 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bob Wilson 2009-10-08 18:52:56 +00:00
parent af4a891273
commit cd7e327cdf
1 changed files with 2 additions and 2 deletions
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4
lib/Target/ARM/ARMISelDAGToDAG.cpp
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@ -1405,7 +1405,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
} }
// Quad registers are loaded with two separate instructions, where one // Quad registers are loaded with two separate instructions, where one
// loads the even registers and the other loads the odd registers. // loads the even registers and the other loads the odd registers.
EVT RegVT = VT; EVT RegVT;
unsigned Opc2 = 0; unsigned Opc2 = 0;
switch (VT.getSimpleVT().SimpleTy) { switch (VT.getSimpleVT().SimpleTy) {
default: llvm_unreachable("unhandled vld3 type"); default: llvm_unreachable("unhandled vld3 type");
@ -1465,7 +1465,7 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
} }
// Quad registers are loaded with two separate instructions, where one // Quad registers are loaded with two separate instructions, where one
// loads the even registers and the other loads the odd registers. // loads the even registers and the other loads the odd registers.
EVT RegVT = VT; EVT RegVT;
unsigned Opc2 = 0; unsigned Opc2 = 0;
switch (VT.getSimpleVT().SimpleTy) { switch (VT.getSimpleVT().SimpleTy) {
default: llvm_unreachable("unhandled vld4 type"); default: llvm_unreachable("unhandled vld4 type");