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Re-instate the EVT parameter to getScalarShiftAmountTy() for OOT user

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A documentation for this function would be nice by the way.

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@241807 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Mehdi Amini 2015-07-09 15:12:23 +00:00
parent dbbfabaf01
commit cdc323b2b7
17 changed files with 26 additions and 19 deletions
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5
include/llvm/Target/TargetLowering.h
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@ -170,7 +170,10 @@ public:
MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const {
return MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
}
virtual MVT getScalarShiftAmountTy(const DataLayout &) const;
/// EVT is not used in-tree, but is used by out-of-tree target.
/// A documentation for this function would be nice...
virtual MVT getScalarShiftAmountTy(const DataLayout &, EVT) const;
EVT getShiftAmountTy(EVT LHSTy, const DataLayout &DL) const;

3
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -444,7 +444,8 @@ namespace {
if (LHSTy.isVector())
return LHSTy;
auto &DL = DAG.getDataLayout();
return LegalTypes ? TLI.getScalarShiftAmountTy(DL) : TLI.getPointerTy(DL);
return LegalTypes ? TLI.getScalarShiftAmountTy(DL, LHSTy)
: TLI.getPointerTy(DL);
}
/// This method returns true if we are running before type legalization or

5
lib/CodeGen/TargetLoweringBase.cpp
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@ -878,7 +878,8 @@ void TargetLoweringBase::initActions() {
setOperationAction(ISD::DEBUGTRAP, MVT::Other, Expand);
}
MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL) const {
MVT TargetLoweringBase::getScalarShiftAmountTy(const DataLayout &DL,
EVT) const {
return MVT::getIntegerVT(8 * DL.getPointerSize(0));
}
@ -887,7 +888,7 @@ EVT TargetLoweringBase::getShiftAmountTy(EVT LHSTy,
assert(LHSTy.isInteger() && "Shift amount is not an integer type!");
if (LHSTy.isVector())
return LHSTy;
return getScalarShiftAmountTy(DL);
return getScalarShiftAmountTy(DL, LHSTy);
}
/// canOpTrap - Returns true if the operation can trap for the value type.

3
lib/Target/AArch64/AArch64ISelLowering.cpp
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@ -775,7 +775,8 @@ void AArch64TargetLowering::computeKnownBitsForTargetNode(
}
}
MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL) const {
MVT AArch64TargetLowering::getScalarShiftAmountTy(const DataLayout &DL,
EVT) const {
return MVT::i64;
}

2
lib/Target/AArch64/AArch64ISelLowering.h
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@ -233,7 +233,7 @@ public:
APInt &KnownOne, const SelectionDAG &DAG,
unsigned Depth = 0) const override;
MVT getScalarShiftAmountTy(const DataLayout &DL) const override;
MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
/// allowsMisalignedMemoryAccesses - Returns true if the target allows
/// unaligned memory accesses of the specified type.

2
lib/Target/AMDGPU/SIISelLowering.cpp
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@ -704,7 +704,7 @@ EVT SITargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &Ctx,
return EVT::getVectorVT(Ctx, MVT::i1, VT.getVectorNumElements());
}
MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &) const {
MVT SITargetLowering::getScalarShiftAmountTy(const DataLayout &, EVT) const {
return MVT::i32;
}

2
lib/Target/AMDGPU/SIISelLowering.h
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@ -92,7 +92,7 @@ public:
bool enableAggressiveFMAFusion(EVT VT) const override;
EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
EVT VT) const override;
MVT getScalarShiftAmountTy(const DataLayout &) const override;
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override;
bool isFMAFasterThanFMulAndFAdd(EVT VT) const override;
SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;

2
lib/Target/MSP430/MSP430ISelLowering.h
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@ -72,7 +72,7 @@ namespace llvm {
explicit MSP430TargetLowering(const TargetMachine &TM,
const MSP430Subtarget &STI);
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i8;
}

2
lib/Target/Mips/MipsISelLowering.h
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@ -227,7 +227,7 @@ namespace llvm {
FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
const TargetLibraryInfo *libInfo) const override;
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}

3
lib/Target/Mips/MipsSEISelLowering.cpp
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@ -839,7 +839,8 @@ static SDValue performMULCombine(SDNode *N, SelectionDAG &DAG,
if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(N->getOperand(1)))
if (!VT.isVector())
return genConstMult(N->getOperand(0), C->getZExtValue(), SDLoc(N), VT,
TL->getScalarShiftAmountTy(DAG.getDataLayout()), DAG);
TL->getScalarShiftAmountTy(DAG.getDataLayout(), VT),
DAG);
return SDValue(N, 0);
}

2
lib/Target/NVPTX/NVPTXISelLowering.h
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@ -500,7 +500,7 @@ public:
const NVPTXTargetMachine *nvTM;
// PTX always uses 32-bit shift amounts
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}

2
lib/Target/PowerPC/PPCISelLowering.h
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@ -423,7 +423,7 @@ namespace llvm {
/// DAG node.
const char *getTargetNodeName(unsigned Opcode) const override;
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}

2
lib/Target/Sparc/SparcISelLowering.h
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@ -85,7 +85,7 @@ namespace llvm {
StringRef Constraint, MVT VT) const override;
bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}

2
lib/Target/SystemZ/SystemZISelLowering.h
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@ -339,7 +339,7 @@ public:
const SystemZSubtarget &STI);
// Override TargetLowering.
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i32;
}
MVT getVectorIdxTy(const DataLayout &DL) const override {

4
lib/Target/X86/X86ISelLowering.cpp
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@ -4852,7 +4852,7 @@ static SDValue getVShift(bool isLeft, EVT VT, SDValue SrcOp,
MVT ShVT = MVT::v2i64;
unsigned Opc = isLeft ? X86ISD::VSHLDQ : X86ISD::VSRLDQ;
SrcOp = DAG.getBitcast(ShVT, SrcOp);
MVT ScalarShiftTy = TLI.getScalarShiftAmountTy(DAG.getDataLayout());
MVT ScalarShiftTy = TLI.getScalarShiftAmountTy(DAG.getDataLayout(), VT);
assert(NumBits % 8 == 0 && "Only support byte sized shifts");
SDValue ShiftVal = DAG.getConstant(NumBits/8, dl, ScalarShiftTy);
return DAG.getBitcast(VT, DAG.getNode(Opc, dl, ShVT, SrcOp, ShiftVal));
@ -7409,7 +7409,7 @@ static SDValue lowerVectorShuffleAsElementInsertion(
X86ISD::VSHLDQ, DL, MVT::v2i64, V2,
DAG.getConstant(V2Index * EltVT.getSizeInBits() / 8, DL,
DAG.getTargetLoweringInfo().getScalarShiftAmountTy(
DAG.getDataLayout())));
DAG.getDataLayout(), VT)));
V2 = DAG.getBitcast(VT, V2);
}
}

2
lib/Target/X86/X86ISelLowering.h
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@ -598,7 +598,7 @@ namespace llvm {
unsigned getJumpTableEncoding() const override;
bool useSoftFloat() const override;
MVT getScalarShiftAmountTy(const DataLayout &) const override {
MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override {
return MVT::i8;
}

2
lib/Target/XCore/XCoreISelLowering.h
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@ -101,7 +101,7 @@ namespace llvm {
unsigned getJumpTableEncoding() const override;
MVT getScalarShiftAmountTy(const DataLayout &DL) const override {
MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override {
return MVT::i32;
}