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https://github.com/c64scene-ar/llvm-6502.git
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Revert r166046 "Switch back to the old coalescer for now to fix the 32 bit bit"
A fix for PR14098, including the test case is in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166067 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
parent
4932bbe20c
commit
cdcdfd2cab
@ -68,11 +68,6 @@ VerifyCoalescing("verify-coalescing",
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cl::desc("Verify machine instrs before and after register coalescing"),
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cl::Hidden);
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// Temporary option for testing new coalescer algo.
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static cl::opt<bool>
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NewCoalescer("new-coalescer", cl::Hidden, cl::init(false),
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cl::desc("Use new coalescer algorithm"));
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namespace {
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class RegisterCoalescer : public MachineFunctionPass,
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private LiveRangeEdit::Delegate {
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@ -1882,348 +1877,10 @@ bool RegisterCoalescer::joinVirtRegs(CoalescerPair &CP) {
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return true;
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}
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/// ComputeUltimateVN - Assuming we are going to join two live intervals,
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/// compute what the resultant value numbers for each value in the input two
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/// ranges will be. This is complicated by copies between the two which can
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/// and will commonly cause multiple value numbers to be merged into one.
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///
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/// VN is the value number that we're trying to resolve. InstDefiningValue
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/// keeps track of the new InstDefiningValue assignment for the result
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/// LiveInterval. ThisFromOther/OtherFromThis are sets that keep track of
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/// whether a value in this or other is a copy from the opposite set.
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/// ThisValNoAssignments/OtherValNoAssignments keep track of value #'s that have
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/// already been assigned.
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///
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/// ThisFromOther[x] - If x is defined as a copy from the other interval, this
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/// contains the value number the copy is from.
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///
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static unsigned ComputeUltimateVN(VNInfo *VNI,
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SmallVector<VNInfo*, 16> &NewVNInfo,
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DenseMap<VNInfo*, VNInfo*> &ThisFromOther,
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DenseMap<VNInfo*, VNInfo*> &OtherFromThis,
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SmallVector<int, 16> &ThisValNoAssignments,
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SmallVector<int, 16> &OtherValNoAssignments) {
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unsigned VN = VNI->id;
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// If the VN has already been computed, just return it.
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if (ThisValNoAssignments[VN] >= 0)
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return ThisValNoAssignments[VN];
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assert(ThisValNoAssignments[VN] != -2 && "Cyclic value numbers");
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// If this val is not a copy from the other val, then it must be a new value
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// number in the destination.
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DenseMap<VNInfo*, VNInfo*>::iterator I = ThisFromOther.find(VNI);
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if (I == ThisFromOther.end()) {
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NewVNInfo.push_back(VNI);
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return ThisValNoAssignments[VN] = NewVNInfo.size()-1;
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}
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VNInfo *OtherValNo = I->second;
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// Otherwise, this *is* a copy from the RHS. If the other side has already
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// been computed, return it.
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if (OtherValNoAssignments[OtherValNo->id] >= 0)
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return ThisValNoAssignments[VN] = OtherValNoAssignments[OtherValNo->id];
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// Mark this value number as currently being computed, then ask what the
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// ultimate value # of the other value is.
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ThisValNoAssignments[VN] = -2;
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unsigned UltimateVN =
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ComputeUltimateVN(OtherValNo, NewVNInfo, OtherFromThis, ThisFromOther,
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OtherValNoAssignments, ThisValNoAssignments);
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return ThisValNoAssignments[VN] = UltimateVN;
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}
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// Find out if we have something like
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// A = X
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// B = X
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// if so, we can pretend this is actually
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// A = X
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// B = A
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// which allows us to coalesce A and B.
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// VNI is the definition of B. LR is the life range of A that includes
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// the slot just before B. If we return true, we add "B = X" to DupCopies.
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// This implies that A dominates B.
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static bool RegistersDefinedFromSameValue(LiveIntervals &li,
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const TargetRegisterInfo &tri,
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CoalescerPair &CP,
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VNInfo *VNI,
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VNInfo *OtherVNI,
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SmallVector<MachineInstr*, 8> &DupCopies) {
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// FIXME: This is very conservative. For example, we don't handle
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// physical registers.
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MachineInstr *MI = li.getInstructionFromIndex(VNI->def);
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if (!MI || CP.isPartial() || CP.isPhys())
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return false;
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unsigned A = CP.getDstReg();
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if (!TargetRegisterInfo::isVirtualRegister(A))
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return false;
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unsigned B = CP.getSrcReg();
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if (!TargetRegisterInfo::isVirtualRegister(B))
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return false;
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MachineInstr *OtherMI = li.getInstructionFromIndex(OtherVNI->def);
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if (!OtherMI)
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return false;
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if (MI->isImplicitDef()) {
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DupCopies.push_back(MI);
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return true;
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} else {
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if (!MI->isFullCopy())
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return false;
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unsigned Src = MI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(Src))
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return false;
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if (!OtherMI->isFullCopy())
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return false;
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unsigned OtherSrc = OtherMI->getOperand(1).getReg();
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if (!TargetRegisterInfo::isVirtualRegister(OtherSrc))
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return false;
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if (Src != OtherSrc)
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return false;
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// If the copies use two different value numbers of X, we cannot merge
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// A and B.
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LiveInterval &SrcInt = li.getInterval(Src);
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// getVNInfoBefore returns NULL for undef copies. In this case, the
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// optimization is still safe.
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if (SrcInt.getVNInfoBefore(OtherVNI->def) !=
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SrcInt.getVNInfoBefore(VNI->def))
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return false;
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DupCopies.push_back(MI);
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return true;
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}
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}
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/// joinIntervals - Attempt to join these two intervals. On failure, this
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/// returns false.
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bool RegisterCoalescer::joinIntervals(CoalescerPair &CP) {
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// Handle physreg joins separately.
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if (CP.isPhys())
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return joinReservedPhysReg(CP);
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if (NewCoalescer)
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return joinVirtRegs(CP);
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LiveInterval &RHS = LIS->getInterval(CP.getSrcReg());
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DEBUG(dbgs() << "\t\tRHS = " << PrintReg(CP.getSrcReg()) << ' ' << RHS
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<< '\n');
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// Compute the final value assignment, assuming that the live ranges can be
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// coalesced.
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SmallVector<int, 16> LHSValNoAssignments;
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SmallVector<int, 16> RHSValNoAssignments;
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DenseMap<VNInfo*, VNInfo*> LHSValsDefinedFromRHS;
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DenseMap<VNInfo*, VNInfo*> RHSValsDefinedFromLHS;
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SmallVector<VNInfo*, 16> NewVNInfo;
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SmallVector<MachineInstr*, 8> DupCopies;
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SmallVector<MachineInstr*, 8> DeadCopies;
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LiveInterval &LHS = LIS->getOrCreateInterval(CP.getDstReg());
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DEBUG(dbgs() << "\t\tLHS = " << PrintReg(CP.getDstReg(), TRI) << ' ' << LHS
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<< '\n');
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// Loop over the value numbers of the LHS, seeing if any are defined from
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// the RHS.
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for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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if (VNI->isUnused() || VNI->isPHIDef())
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continue;
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MachineInstr *MI = LIS->getInstructionFromIndex(VNI->def);
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assert(MI && "Missing def");
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if (!MI->isCopyLike() && !MI->isImplicitDef()) // Src not defined by a copy?
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continue;
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// Figure out the value # from the RHS.
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VNInfo *OtherVNI = RHS.getVNInfoBefore(VNI->def);
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// The copy could be to an aliased physreg.
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if (!OtherVNI)
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continue;
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// DstReg is known to be a register in the LHS interval. If the src is
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// from the RHS interval, we can use its value #.
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if (CP.isCoalescable(MI))
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DeadCopies.push_back(MI);
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else if (!RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, OtherVNI,
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DupCopies))
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continue;
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LHSValsDefinedFromRHS[VNI] = OtherVNI;
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}
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// Loop over the value numbers of the RHS, seeing if any are defined from
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// the LHS.
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for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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if (VNI->isUnused() || VNI->isPHIDef())
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continue;
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MachineInstr *MI = LIS->getInstructionFromIndex(VNI->def);
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assert(MI && "Missing def");
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if (!MI->isCopyLike() && !MI->isImplicitDef()) // Src not defined by a copy?
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continue;
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// Figure out the value # from the LHS.
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VNInfo *OtherVNI = LHS.getVNInfoBefore(VNI->def);
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// The copy could be to an aliased physreg.
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if (!OtherVNI)
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continue;
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// DstReg is known to be a register in the RHS interval. If the src is
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// from the LHS interval, we can use its value #.
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if (CP.isCoalescable(MI))
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DeadCopies.push_back(MI);
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else if (!RegistersDefinedFromSameValue(*LIS, *TRI, CP, VNI, OtherVNI,
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DupCopies))
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continue;
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RHSValsDefinedFromLHS[VNI] = OtherVNI;
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}
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LHSValNoAssignments.resize(LHS.getNumValNums(), -1);
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RHSValNoAssignments.resize(RHS.getNumValNums(), -1);
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NewVNInfo.reserve(LHS.getNumValNums() + RHS.getNumValNums());
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for (LiveInterval::vni_iterator i = LHS.vni_begin(), e = LHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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unsigned VN = VNI->id;
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if (LHSValNoAssignments[VN] >= 0 || VNI->isUnused())
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continue;
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ComputeUltimateVN(VNI, NewVNInfo,
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LHSValsDefinedFromRHS, RHSValsDefinedFromLHS,
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LHSValNoAssignments, RHSValNoAssignments);
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}
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for (LiveInterval::vni_iterator i = RHS.vni_begin(), e = RHS.vni_end();
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i != e; ++i) {
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VNInfo *VNI = *i;
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unsigned VN = VNI->id;
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if (RHSValNoAssignments[VN] >= 0 || VNI->isUnused())
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continue;
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// If this value number isn't a copy from the LHS, it's a new number.
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if (RHSValsDefinedFromLHS.find(VNI) == RHSValsDefinedFromLHS.end()) {
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NewVNInfo.push_back(VNI);
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RHSValNoAssignments[VN] = NewVNInfo.size()-1;
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continue;
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}
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ComputeUltimateVN(VNI, NewVNInfo,
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RHSValsDefinedFromLHS, LHSValsDefinedFromRHS,
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RHSValNoAssignments, LHSValNoAssignments);
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}
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// Armed with the mappings of LHS/RHS values to ultimate values, walk the
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// interval lists to see if these intervals are coalescable.
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LiveInterval::const_iterator I = LHS.begin();
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LiveInterval::const_iterator IE = LHS.end();
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LiveInterval::const_iterator J = RHS.begin();
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LiveInterval::const_iterator JE = RHS.end();
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// Collect interval end points that will no longer be kills.
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SmallVector<MachineInstr*, 8> LHSOldKills;
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SmallVector<MachineInstr*, 8> RHSOldKills;
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// Skip ahead until the first place of potential sharing.
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if (I != IE && J != JE) {
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if (I->start < J->start) {
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I = std::upper_bound(I, IE, J->start);
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if (I != LHS.begin()) --I;
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} else if (J->start < I->start) {
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J = std::upper_bound(J, JE, I->start);
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if (J != RHS.begin()) --J;
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}
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}
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while (I != IE && J != JE) {
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// Determine if these two live ranges overlap.
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// If so, check value # info to determine if they are really different.
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if (I->end > J->start && J->end > I->start) {
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// If the live range overlap will map to the same value number in the
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// result liverange, we can still coalesce them. If not, we can't.
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if (LHSValNoAssignments[I->valno->id] !=
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RHSValNoAssignments[J->valno->id])
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return false;
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// Extended live ranges should no longer be killed.
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if (!I->end.isBlock() && I->end < J->end)
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if (MachineInstr *MI = LIS->getInstructionFromIndex(I->end))
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LHSOldKills.push_back(MI);
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if (!J->end.isBlock() && J->end < I->end)
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if (MachineInstr *MI = LIS->getInstructionFromIndex(J->end))
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RHSOldKills.push_back(MI);
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}
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if (I->end < J->end)
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++I;
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else
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++J;
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}
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// Clear kill flags where live ranges are extended.
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while (!LHSOldKills.empty())
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LHSOldKills.pop_back_val()->clearRegisterKills(LHS.reg, TRI);
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while (!RHSOldKills.empty())
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RHSOldKills.pop_back_val()->clearRegisterKills(RHS.reg, TRI);
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if (LHSValNoAssignments.empty())
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LHSValNoAssignments.push_back(-1);
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if (RHSValNoAssignments.empty())
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RHSValNoAssignments.push_back(-1);
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// Now erase all the redundant copies.
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for (unsigned i = 0, e = DeadCopies.size(); i != e; ++i) {
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MachineInstr *MI = DeadCopies[i];
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if (!ErasedInstrs.insert(MI))
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continue;
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DEBUG(dbgs() << "\t\terased:\t" << LIS->getInstructionIndex(MI)
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<< '\t' << *MI);
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LIS->RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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}
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SmallVector<unsigned, 8> SourceRegisters;
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for (SmallVector<MachineInstr*, 8>::iterator I = DupCopies.begin(),
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E = DupCopies.end(); I != E; ++I) {
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MachineInstr *MI = *I;
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if (!ErasedInstrs.insert(MI))
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continue;
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// If MI is a copy, then we have pretended that the assignment to B in
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// A = X
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// B = X
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// was actually a copy from A. Now that we decided to coalesce A and B,
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// transform the code into
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// A = X
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// In the case of the implicit_def, we just have to remove it.
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if (!MI->isImplicitDef()) {
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unsigned Src = MI->getOperand(1).getReg();
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SourceRegisters.push_back(Src);
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}
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LIS->RemoveMachineInstrFromMaps(MI);
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MI->eraseFromParent();
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}
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// If B = X was the last use of X in a liverange, we have to shrink it now
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// that B = X is gone.
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for (SmallVector<unsigned, 8>::iterator I = SourceRegisters.begin(),
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E = SourceRegisters.end(); I != E; ++I) {
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LIS->shrinkToUses(&LIS->getInterval(*I));
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}
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// If we get here, we know that we can coalesce the live ranges. Ask the
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// intervals to coalesce themselves now.
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LHS.join(RHS, &LHSValNoAssignments[0], &RHSValNoAssignments[0], NewVNInfo,
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MRI);
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return true;
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return CP.isPhys() ? joinReservedPhysReg(CP) : joinVirtRegs(CP);
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}
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namespace {
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@ -1,4 +1,4 @@
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; RUN: llc < %s -new-coalescer -mcpu=cortex-a9 -verify-coalescing -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mcpu=cortex-a9 -verify-coalescing -verify-machineinstrs | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
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target triple = "thumbv7-apple-ios0.0.0"
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@ -1,23 +0,0 @@
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; RUN: llc -mtriple i386-unknown-linux-gnu -relocation-model=pic -verify-machineinstrs < %s
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; We used to crash on this.
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declare void @foo()
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declare void @foo3(i1 %x)
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define void @bar(i1 %a1, i16 %a2) nounwind align 2 {
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bb0:
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%a3 = trunc i16 %a2 to i8
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%a4 = lshr i16 %a2, 8
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%a5 = trunc i16 %a4 to i8
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br i1 %a1, label %bb1, label %bb2
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bb1:
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br label %bb2
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bb2:
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%a6 = phi i8 [ 3, %bb0 ], [ %a5, %bb1 ]
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%a7 = phi i8 [ 9, %bb0 ], [ %a3, %bb1 ]
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%a8 = icmp eq i8 %a6, 1
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call void @foo()
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%a9 = icmp eq i8 %a7, 0
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call void @foo3(i1 %a9)
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call void @foo3(i1 %a8)
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ret void
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}
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