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[Stackmap] Only the AnyReg calling convention should preserve all registers.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197316 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Juergen Ributzka 2013-12-14 06:52:59 +00:00
parent 57c38e3faa
commit cdeccb0c22
2 changed files with 8 additions and 5 deletions
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5
lib/Target/X86/X86CallingConv.td
View File

@ -617,6 +617,11 @@ def CSR_MostRegs_64 : CalleeSavedRegs<(add RBX, RCX, RDX, RSI, RDI, R8, R9, R10,
R11, R12, R13, R14, R15, RBP,
(sequence "XMM%u", 0, 15))>;
def CSR_AllRegs_64 : CalleeSavedRegs<(add CSR_MostRegs_64, RAX, RSP,
(sequence "XMM%u", 16, 31),
(sequence "YMM%u", 0, 31),
(sequence "ZMM%u", 0, 31))>;
// Standard C + YMM6-15
def CSR_Win64_Intel_OCL_BI_AVX : CalleeSavedRegs<(add RBX, RBP, RDI, RSI, R12,
R13, R14, R15,

8
lib/Target/X86/X86RegisterInfo.cpp
View File

@ -239,10 +239,8 @@ X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
case CallingConv::HiPE:
return CSR_NoRegs_SaveList;
case CallingConv::WebKit_JS:
return CSR_64_SaveList;
case CallingConv::AnyReg:
return CSR_MostRegs_64_SaveList;
return CSR_AllRegs_64_SaveList;
case CallingConv::Intel_OCL_BI: {
bool HasAVX = TM.getSubtarget<X86Subtarget>().hasAVX();
@ -301,8 +299,8 @@ X86RegisterInfo::getCallPreservedMask(CallingConv::ID CC) const {
}
if (CC == CallingConv::GHC || CC == CallingConv::HiPE)
return CSR_NoRegs_RegMask;
if (CC == CallingConv::WebKit_JS || CC == CallingConv::AnyReg)
return CSR_MostRegs_64_RegMask;
if (CC == CallingConv::AnyReg)
return CSR_AllRegs_64_RegMask;
if (!Is64Bit)
return CSR_32_RegMask;
if (CC == CallingConv::Cold)