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[ARM] Add support for ARMV6K subtarget (LLVM)
ARMv6K is another layer between ARMV6 and ARMV6T2. This is the LLVM side of the changes. ARMV6 family LLVM implementation. +-------------------------------------+ | ARMV6 | +----------------+--------------------+ | ARMV6M (thumb) | ARMV6K (arm,thumb) | <- From ARMV6K and ARMV6M processors +----------------+--------------------+ have support for hint instructions | ARMV6T2 (arm,thumb,thumb2) | (SEV/WFE/WFI/NOP/YIELD). They can +-------------------------------------+ be either real or default to NOP. | ARMV7 (arm,thumb,thumb2) | The two processors also use +-------------------------------------+ different encoding for them. Patch by Vinicius Tinti. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232468 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -415,6 +415,7 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
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.EndsWith("v6", Triple::ARMSubArch_v6)
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.EndsWith("v6m", Triple::ARMSubArch_v6m)
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.EndsWith("v6sm", Triple::ARMSubArch_v6m)
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.EndsWith("v6k", Triple::ARMSubArch_v6k)
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.EndsWith("v6t2", Triple::ARMSubArch_v6t2)
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.EndsWith("v5", Triple::ARMSubArch_v5)
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.EndsWith("v5e", Triple::ARMSubArch_v5)
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@@ -1073,9 +1074,9 @@ const char *Triple::getARMCPUForArch(StringRef MArch) const {
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.Cases("v5", "v5t", "arm10tdmi")
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.Cases("v5e", "v5te", "arm1022e")
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.Case("v5tej", "arm926ej-s")
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.Cases("v6", "v6k", "arm1136jf-s")
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.Case("v6", "arm1136jf-s")
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.Case("v6j", "arm1136j-s")
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.Cases("v6z", "v6zk", "arm1176jzf-s")
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.Cases("v6k", "v6z", "v6zk", "arm1176jzf-s")
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.Case("v6t2", "arm1156t2-s")
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.Cases("v6m", "v6-m", "v6sm", "v6s-m", "cortex-m0")
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.Cases("v7", "v7a", "v7-a", "v7l", "v7-l", "cortex-a8")
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