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Addressing mode 6 (load/store) instructions can't encode an immediate offset

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for stack references.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92871 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Grosbach 2010-01-06 23:45:18 +00:00
parent 80c2b0d9ef
commit ce3e769c15
1 changed files with 4 additions and 1 deletions
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5
lib/Target/ARM/ARMBaseRegisterInfo.cpp
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@ -523,7 +523,7 @@ static unsigned estimateStackSize(MachineFunction &MF, MachineFrameInfo *MFI) {
/// estimateRSStackSizeLimit - Look at each instruction that references stack
/// frames and return the stack size limit beyond which some of these
/// instructions will require scratch register during their expansion later.
/// instructions will require a scratch register during their expansion later.
unsigned
ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const {
unsigned Limit = (1 << 12) - 1;
@ -547,6 +547,9 @@ ARMBaseRegisterInfo::estimateRSStackSizeLimit(MachineFunction &MF) const {
// When the stack offset is negative, we will end up using
// the i8 instructions instead.
return (1 << 8) - 1;
if (AddrMode == ARMII::AddrMode6)
return 0;
break; // At most one FI per instruction
}
}