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Fix a bug in the ARM disassembler for wide branch conditional instructions

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where the symbolic operand's displacement was incorrectly shifted left by 1.
rdar://11387046


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156212 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Kevin Enderby 2012-05-04 22:02:27 +00:00
parent 917644d0c3
commit ce734d5ffe
1 changed files with 1 additions and 1 deletions
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lib/Target/ARM/Disassembler/ARMDisassembler.cpp
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@ -3016,7 +3016,7 @@ static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
uint64_t Address, const void *Decoder) {
if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val<<1) + 4,
if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val) + 4,
true, 4, Inst, Decoder))
Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
return MCDisassembler::Success;