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Fix a bug in the ARM disassembler for wide branch conditional instructions
where the symbolic operand's displacement was incorrectly shifted left by 1. rdar://11387046 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156212 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3016,7 +3016,7 @@ static DecodeStatus DecodeThumbBROperand(MCInst &Inst, unsigned Val,
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static DecodeStatus DecodeT2BROperand(MCInst &Inst, unsigned Val,
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uint64_t Address, const void *Decoder) {
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if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val<<1) + 4,
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if (!tryAddingSymbolicOperand(Address, Address + SignExtend32<22>(Val) + 4,
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true, 4, Inst, Decoder))
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Inst.addOperand(MCOperand::CreateImm(SignExtend32<21>(Val)));
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return MCDisassembler::Success;
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